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Message-ID: <CAOMZO5D8giOiBCeV5AP1pL+hCFQt9bs3gFsr2mCgMSSbcbCovw@mail.gmail.com>
Date: Tue, 20 May 2025 10:34:29 -0300
From: Fabio Estevam <festevam@...il.com>
To: Christoph Stoidner <c.stoidner@...tec.de>
Cc: Primoz Fiser <primoz.fiser@...ik.com>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Shawn Guo <shawnguo@...nel.org>, Sascha Hauer <s.hauer@...gutronix.de>, 
	Pengutronix Kernel Team <kernel@...gutronix.de>, devicetree@...r.kernel.org, imx@...ts.linux.dev, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	upstream@...ts.phytec.de
Subject: Re: [PATCH v2] arm64: dts: freescale: imx93-phycore-som: Delay the
 phy reset by a gpio

On Tue, May 20, 2025 at 8:52 AM Christoph Stoidner <c.stoidner@...tec.de> wrote:

> diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
> index 88c2657b50e6..c08f4b8a65a6 100644
> --- a/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93-phycore-som.dtsi
> @@ -58,6 +58,9 @@ &fec {
>                                  <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
>                                  <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
>         assigned-clock-rates = <100000000>, <50000000>, <50000000>;
> +       phy-reset-gpios = <&gpio4 23 GPIO_ACTIVE_HIGH>;
> +       phy-reset-duration = <1>;
> +       phy-reset-post-delay = <0>;

These properties are marked as deprecated in fsl,fec.yaml.

It would be better to place the properties described by
ethernet-phy.yaml under the ethernet-phy@1 node.

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