[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <87y0uqq8gg.ffs@tglx>
Date: Wed, 21 May 2025 17:39:27 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Ingo Molnar <mingo@...nel.org>, Eric Biggers <ebiggers@...nel.org>
Cc: x86@...nel.org, linux-kernel@...r.kernel.org,
linux-crypto@...r.kernel.org, linux-pm@...r.kernel.org, Borislav Petkov
<bp@...en8.de>, Ayush Jain <Ayush.Jain3@....com>, Herbert Xu
<herbert@...dor.apana.org.au>, Ard Biesheuvel <ardb@...nel.org>
Subject: Re: [PATCH] x86/fpu: Fix irq_fpu_usable() to return false during
CPU onlining
On Tue, May 20 2025 at 11:33, Ingo Molnar wrote:
> * Eric Biggers <ebiggers@...nel.org> wrote:
>
>> Or we could use DEFINE_PER_CPU() = true in patch 1, then revert that
>> in patch 2 and replace it with the line in fpu__init_cpu(). But
>> again I think the split would be more likely to create problems than
>> solve them.
>
> Well, my request would be for the first patch to simply mimic current
> (and buggy) behavior as much as reasonably possible (obviously the
> effects of BSS zeroing shouldn't be mimiced 100%) - and the second
> patch to fix the initialization-ordering bug.
So the first patch is then incomprehensible buggy and needs a trivial
one-liner to fix up, right?
TBH, that's just bonkers. Eric's patch is trivial enough as is and easy
to review. Artifical patch splitting with buggy intermediate state makes
only sense, when the overall changes are massive and hard to
review. That's absolutely not the case here.
Thanks,
tglx
Powered by blists - more mailing lists