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Message-ID: <657a085c-4214-4096-8a68-047d57a40d60@lunn.ch>
Date: Wed, 21 May 2025 18:25:50 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Quentin Schulz <foss+kernel@...il.net>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>,
Jakob Unterwurzacher <jakob.unterwurzacher@...rry.de>,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Quentin Schulz <quentin.schulz@...rry.de>
Subject: Re: [PATCH 2/2] arm64: dts: rockchip: support Ethernet Switch
adapter for RK3588 Jaguar
> +&gmac1 {
> + clock_in_out = "output";
> + phy-mode = "rgmii";
Does the PCB have extra long clock lines to implement the 2ns delays?
> + pinctrl-names = "default";
> + pinctrl-0 = <&gmac1_rx_bus2
> + &gmac1_tx_bus2
> + &gmac1_rgmii_clk
> + &gmac1_rgmii_bus
> + ð1_pins>;
> + rx_delay = <0x30>;
> + tx_delay = <0x30>;
Since this has a switch on the other end, its a bit more complicated
with RGMII delays. Normally, the MAC does nothing and passed rgmii-id
to the PHY, and the PHY then does the delays. However, here you don't
have a PHY. So you have the MAC add the delays. This looks O.K. I
would prefer that the driver used the standardized
rx-internal-delay-ps & tx-internal-delay-ps rather than these vendor
properties. But that is probably out of scope for this patchset.
> + port@5 {
> + reg = <5>;
> + ethernet = <&gmac1>;
> + label = "CPU";
> + phy-mode = "rgmii";
Again, this probably should be rgmii-id to correctly describe the PCB,
but i don't know if the switch takes any notice of it.
Andrew
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