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Message-ID: <CAAeCc_nLSuDrHTPNt39mK4Ea_PD6fO4a=x21kgQoMVWWPNvbPg@mail.gmail.com>
Date: Wed, 21 May 2025 11:08:53 +0530
From: Bharat Bhushan <bharatb.linux@...il.com>
To: Herbert Xu <herbert@...dor.apana.org.au>
Cc: Bharat Bhushan <bbhushan2@...vell.com>, bbrezillon@...nel.org, schalla@...vell.com,
davem@...emloft.net, giovanni.cabiddu@...el.com, linux@...blig.org,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
stable@...r.kernel.org
Subject: Re: [PATCH 3/4 v2] crypto: octeontx2: Fix address alignment on CN10K
A0/A1 and OcteonTX2
On Wed, May 21, 2025 at 4:34 AM Herbert Xu <herbert@...dor.apana.org.au> wrote:
>
> On Tue, May 20, 2025 at 06:37:36PM +0530, Bharat Bhushan wrote:
> >
> > + info->in_buffer = PTR_ALIGN((u8 *)info + info_len,
> > + OTX2_CPT_DPTR_RPTR_ALIGN);
>
> Any address that's used for bidirectional or from-device DMA
> needs to be aligned to ARCH_DMA_MINALIGN.
>
> Sorry I missed this during the first round.
Will change in the next version.
Thanks
-Bharat
>
> Cheers,
> --
> Email: Herbert Xu <herbert@...dor.apana.org.au>
> Home Page: http://gondor.apana.org.au/~herbert/
> PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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