linux-kernel - RE: [PATCH v2 1/2] dt-bindings: phy: samsung,usb3-drd-phy: add dt-schema for ExynosAutov920

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Message-ID: <000101dbca40$c32aee90$4980cbb0$@samsung.com>
Date: Wed, 21 May 2025 16:38:59 +0530
From: "Pritam Manohar Sutar" <pritam.sutar@...sung.com>
To: "'Krzysztof Kozlowski'" <krzk@...nel.org>, <vkoul@...nel.org>,
	<kishon@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
	<conor+dt@...nel.org>, <alim.akhtar@...sung.com>,
	<andre.draszik@...aro.org>, <peter.griffin@...aro.org>,
	<kauschluss@...root.org>, <m.szyprowski@...sung.com>,
	<s.nawrocki@...sung.com>
Cc: <linux-phy@...ts.infradead.org>, <devicetree@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
	<linux-samsung-soc@...r.kernel.org>, <rosa.pila@...sung.com>,
	<dev.tailor@...sung.com>, <faraz.ata@...sung.com>,
	<muhammed.ali@...sung.com>, <selvarasu.g@...sung.com>
Subject: RE: [PATCH v2 1/2] dt-bindings: phy: samsung,usb3-drd-phy: add
 dt-schema for ExynosAutov920

Hi Krzysztof, 

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@...nel.org>
> Sent: 21 May 2025 02:15 PM
> To: Pritam Manohar Sutar <pritam.sutar@...sung.com>; vkoul@...nel.org;
> kishon@...nel.org; robh@...nel.org; krzk+dt@...nel.org;
> conor+dt@...nel.org; alim.akhtar@...sung.com; andre.draszik@...aro.org;
> peter.griffin@...aro.org; kauschluss@...root.org;
> m.szyprowski@...sung.com; s.nawrocki@...sung.com
> Cc: linux-phy@...ts.infradead.org; devicetree@...r.kernel.org; linux-
> kernel@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-samsung-
> soc@...r.kernel.org; rosa.pila@...sung.com; dev.tailor@...sung.com;
> faraz.ata@...sung.com; muhammed.ali@...sung.com;
> selvarasu.g@...sung.com
> Subject: Re: [PATCH v2 1/2] dt-bindings: phy: samsung,usb3-drd-phy: add dt-
> schema for ExynosAutov920
> 
> On 21/05/2025 08:48, Pritam Manohar Sutar wrote:
> >>> diff --git
> >>> a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
> >>> b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
> >>> index fdddddc7d611..c50f4218ded9 100644
> >>> ---
> >>> a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
> >>> +++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yam
> >>> +++ l
> >>> @@ -32,6 +32,7 @@ properties:
> >>>        - samsung,exynos7-usbdrd-phy
> >>>        - samsung,exynos7870-usbdrd-phy
> >>>        - samsung,exynos850-usbdrd-phy
> >>> +      - samsung,exynosautov920-usb31drd-phy
> >>>
> >>>    clocks:
> >>>      minItems: 2
> >>> @@ -204,6 +205,32 @@ allOf:
> >>>          reg-names:
> >>>            maxItems: 1
> >>>
> >>> +  - if:
> >>> +      properties:
> >>> +        compatible:
> >>> +          contains:
> >>> +            const: samsung,exynosautov920-usb31drd-phy
> >>> +    then:
> >>> +      $ref: /schemas/usb/usb-switch.yaml#
> >>> +
> >>> +      properties:
> >>> +        clocks:
> >>> +          items:
> >>
> >> Why there is no main PHY clock?
> >
> > external crystal clk (ext_xtal) is used as main phy clk.
> 
> So this is the main phy clock? This describes the clock input, not what you have
> on your board. If you change external crystal to internal clock in one design, you
> change the binding? No, this makes no sense.
> 
> 

Yes, this is the main phy clock. Will revisit the binding and try reusing existing one.

> 
> Best regards,
> Krzysztof

Thank you,
Pritam