linux-kernel - Re: [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850

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Message-ID: <CABjd4YwoVRpJEMss8UN6xT9x4hf6GSjm34GtTHmmnHi8Q42DAQ@mail.gmail.com>
Date: Wed, 21 May 2025 17:28:29 +0400
From: Alexey Charkov <alchark@...il.com>
To: Krzysztof Kozlowski <krzk@...nel.org>, Rob Herring <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 0/5] ARM: dts: vt8500: Minor fixups and L2 cache on WM8850

On Thu, May 15, 2025 at 11:39 PM Alexey Charkov <alchark@...il.com> wrote:
>
> Small fixups for VT8500 related device trees to improve correctness in
> light of current guidelines.
>
> While at that, also include a DT node for the PL310 cache controller
> present in WM8850/WM8950.
>
> Signed-off-by: Alexey Charkov <alchark@...il.com>
> ---
> Alexey Charkov (5):
>       ARM: dts: vt8500: Add node address and reg in CPU nodes
>       ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
>       ARM: dts: vt8500: Use generic node name for the SD/MMC controller
>       ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
>       ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950

Krzysztof, could you please pick these up for 6.16?

No big deal here, but W=1 builds and DTBS_CHECK become somewhat happier.

Thanks a lot,
Alexey