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Message-ID: <6a0c12e2-08c4-4df1-b1f6-8db8b0029b5f@amd.com>
Date: Thu, 22 May 2025 11:12:45 -0500
From: "Naik, Avadhut" <avadnaik@....com>
To: Avadhut Naik <avadhut.naik@....com>
Cc: bp@...en8.de, linux-kernel@...r.kernel.org,
Žilvinas Žaltiena <zilvinas@...rix.lt>,
Yazen Ghannam <yazen.ghannam@....com>, linux-edac@...r.kernel.org
Subject: [PATCH v4] EDAC/amd64: Fix size calculation for Non-Power-of-Two
DIMMs
Hi,
Any further feedback on this patch?
--
Thanks,
Avadhut Naik
On 5/13/2025 14:20, Avadhut Naik wrote:
> Each Chip-Select (CS) of a Unified Memory Controller (UMC) on AMD's
> modern Zen-based SOCs has an Address Mask and a Secondary Address Mask
> register associated with it. The amd64_edac module logs DIMM sizes on a
> per-UMC per-CS granularity during init using these two registers.
>
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