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Message-ID: <CAMuHMdWJQm7bhfFAWvsU2SweCrPGDCSHd_rw5+oTXWWdV9mZQw@mail.gmail.com>
Date: Thu, 22 May 2025 14:46:17 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
Cc: tomm.merciai@...il.com, linux-renesas-soc@...r.kernel.org,
biju.das.jz@...renesas.com, prabhakar.mahadev-lad.rj@...renesas.com,
Magnus Damm <magnus.damm@...il.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Niklas Söderlund <niklas.soderlund+renesas@...natech.se>
Subject: Re: [PATCH 1/4] arm64: dts: renesas: r9a09g047: Add CRU, CSI2 nodes
Hi Tommaso,
On Wed, 14 May 2025 at 18:25, Tommaso Merciai
<tommaso.merciai.xr@...renesas.com> wrote:
> Add CRU, CSI2 nodes to RZ/RZG3E SoC DTSI.
>
> Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@...renesas.com>
Thanks for your patch!
> --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
> @@ -669,6 +669,75 @@ sdhi2_vqmmc: vqmmc-regulator {
> status = "disabled";
> };
> };
> +
> + cru: video@...00000 {
> + compatible = "renesas,r9a09g047-cru";
> + reg = <0 0x16000000 0 0x400>;
> + clocks = <&cpg CPG_MOD 0xd3>,
> + <&cpg CPG_MOD 0xd4>,
> + <&cpg CPG_MOD 0xd2>;
> + clock-names = "video", "apb", "axi";
> + interrupts = <GIC_SPI 838 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 839 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 840 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 841 IRQ_TYPE_EDGE_RISING>,
> + <GIC_SPI 842 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "image_conv", "axi_mst_err",
> + "vd_addr_wend", "sd_addr_wend",
> + "vsd_addr_wend";
> + resets = <&cpg 0xc5>, <&cpg 0xc6>;
> + reset-names = "presetn", "aresetn";
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
I think the plan was to get rid of #{address,size}-cells...
> +
> + reg = <1>;
> + crucsi2: endpoint@0 {
> + reg = <0>;
... and of the unit address and reg property here...
> + remote-endpoint = <&csi2cru>;
> + };
> + };
> + };
> + };
> +
> + csi2: csi2@...00400 {
> + compatible = "renesas,r9a09g047-csi2", "renesas,r9a09g057-csi2";
> + reg = <0 0x16000400 0 0xc00>;
> + interrupts = <GIC_SPI 837 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 0xd3>, <&cpg CPG_MOD 0xd4>;
> + clock-names = "video", "apb";
> + resets = <&cpg 0xc5>, <&cpg 0xc7>;
> + reset-names = "presetn", "cmn-rstb";
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + };
> +
> + port@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
... and here...
> + reg = <1>;
> +
> + csi2cru: endpoint@0 {
> + reg = <0>;
... and here[1].
As that still hasn't happened, and the example in the bindings wasn't
updated either, I will keep it like this.
Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
i.e. will queue in renesas-devel for v6.17.
> + remote-endpoint = <&crucsi2>;
> + };
> + };
> + };
> + };
> };
>
> timer {
[1] "[PATCH] arm64: dts: renesas: r9a07g0{43,44,54}: Drop
#address-cells/#size-cells from single child node 'endpoint@0'"
https://lore.kernel.org/all/20240609095049.17193-1-biju.das.jz@bp.renesas.com/
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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