linux-kernel - Re: [PATCH] LoongArch: Avoid using $r0/$r1 as "mask" for csrxchg

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Message-ID: <fa882110d20bd824aca690ba5dfea8c0bd303fc3.camel@xry111.site>
Date: Fri, 23 May 2025 12:38:15 +0800
From: Xi Ruoyao <xry111@...111.site>
To: Huacai Chen <chenhuacai@...ngson.cn>, Huacai Chen <chenhuacai@...nel.org>
Cc: loongarch@...ts.linux.dev, Xuefeng Li <lixuefeng@...ngson.cn>, Guo Ren	
 <guoren@...nel.org>, Xuerui Wang <kernel@...0n.name>, Jiaxun Yang	
 <jiaxun.yang@...goat.com>, linux-kernel@...r.kernel.org,
 stable@...r.kernel.org,  WANG Rui <wangrui@...ngson.cn>
Subject: Re: [PATCH] LoongArch: Avoid using $r0/$r1 as "mask" for csrxchg

On Thu, 2025-05-22 at 20:50 +0800, Huacai Chen wrote:
> When building kernel with LLVM there are occasionally such errors:
> 
> In file included from ./include/linux/spinlock.h:59:
> In file included from ./include/linux/irqflags.h:17:
> arch/loongarch/include/asm/irqflags.h:38:3: error: must not be $r0 or $r1
>    38 |                 "csrxchg %[val], %[mask], %[reg]\n\t"
>       |                 ^
> <inline asm>:1:16: note: instantiated into assembly here
>     1 |         csrxchg $a1, $ra, 0
>       |                       ^
> 
> The "mask" of the csrxchg instruction should not be $r0 or $r1, but the
> compiler cannot avoid generating such code currently.

Maybe "to prevent the compiler from allocating $r0 or $r1, the 'q'
constraint must be used but Clang < 22 does not support it.  So force to
use t0 in order to avoid using $r0/$r1 while keeping the backward
compatibility."

And Link: https://github.com/llvm/llvm-project/pull/141037

> So force to use t0
> in the inline asm, in order to avoid using $r0/$r1.
> 
> Cc: stable@...r.kernel.org
> Suggested-by: WANG Rui <wangrui@...ngson.cn>
> Signed-off-by: Huacai Chen <chenhuacai@...ngson.cn>
> ---
>  arch/loongarch/include/asm/irqflags.h | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/loongarch/include/asm/irqflags.h b/arch/loongarch/include/asm/irqflags.h
> index 319a8c616f1f..003172b8406b 100644
> --- a/arch/loongarch/include/asm/irqflags.h
> +++ b/arch/loongarch/include/asm/irqflags.h
> @@ -14,40 +14,48 @@
>  static inline void arch_local_irq_enable(void)
>  {
>  	u32 flags = CSR_CRMD_IE;
> +	register u32 mask asm("t0") = CSR_CRMD_IE;
> +
>  	__asm__ __volatile__(
>  		"csrxchg %[val], %[mask], %[reg]\n\t"
>  		: [val] "+r" (flags)
> -		: [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)
> +		: [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)
>  		: "memory");
>  }
>  
>  static inline void arch_local_irq_disable(void)
>  {
>  	u32 flags = 0;
> +	register u32 mask asm("t0") = CSR_CRMD_IE;
> +
>  	__asm__ __volatile__(
>  		"csrxchg %[val], %[mask], %[reg]\n\t"
>  		: [val] "+r" (flags)
> -		: [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)
> +		: [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)
>  		: "memory");
>  }
>  
>  static inline unsigned long arch_local_irq_save(void)
>  {
>  	u32 flags = 0;
> +	register u32 mask asm("t0") = CSR_CRMD_IE;
> +
>  	__asm__ __volatile__(
>  		"csrxchg %[val], %[mask], %[reg]\n\t"
>  		: [val] "+r" (flags)
> -		: [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)
> +		: [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)
>  		: "memory");
>  	return flags;
>  }
>  
>  static inline void arch_local_irq_restore(unsigned long flags)
>  {
> +	register u32 mask asm("t0") = CSR_CRMD_IE;
> +
>  	__asm__ __volatile__(
>  		"csrxchg %[val], %[mask], %[reg]\n\t"
>  		: [val] "+r" (flags)
> -		: [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)
> +		: [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)
>  		: "memory");
>  }
>  

-- 
Xi Ruoyao <xry111@...111.site>
School of Aerospace Science and Technology, Xidian University