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Message-ID: <cad644ea-a2c9-490d-ab41-160c73425169@ghiti.fr>
Date: Fri, 23 May 2025 10:53:59 +0200
From: Alexandre Ghiti <alex@...ti.fr>
To: Han Gao <rabenda.cn@...il.com>, linux-riscv@...ts.infradead.org
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>,
 Charlie Jenkins <charlie@...osinc.com>, Jesse Taube <jesse@...osinc.com>,
 Andy Chiu <andybnac@...il.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] riscv: vector: fix xtheadvector save/restore

Hi Han,

On 5/22/25 19:27, Han Gao wrote:
> Fix [1] save/restore vector register error
>
> Link: https://lore.kernel.org/all/20241113-xtheadvector-v11-9-236c22791ef9@rivosinc.com/ [1]


Would you mind rephrasing the log? It should explain what was wrong and 
how you fixed it.

Thanks,

Alex


>
> Signed-off-by: Han Gao <rabenda.cn@...il.com>
> ---
>   arch/riscv/include/asm/vector.h | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/arch/riscv/include/asm/vector.h b/arch/riscv/include/asm/vector.h
> index e8a83f55be2b..7df6355023a3 100644
> --- a/arch/riscv/include/asm/vector.h
> +++ b/arch/riscv/include/asm/vector.h
> @@ -200,11 +200,11 @@ static inline void __riscv_v_vstate_save(struct __riscv_v_ext_state *save_to,
>   			THEAD_VSETVLI_T4X0E8M8D1
>   			THEAD_VSB_V_V0T0
>   			"add		t0, t0, t4\n\t"
> -			THEAD_VSB_V_V0T0
> +			THEAD_VSB_V_V8T0
>   			"add		t0, t0, t4\n\t"
> -			THEAD_VSB_V_V0T0
> +			THEAD_VSB_V_V16T0
>   			"add		t0, t0, t4\n\t"
> -			THEAD_VSB_V_V0T0
> +			THEAD_VSB_V_V24T0
>   			: : "r" (datap) : "memory", "t0", "t4");
>   	} else {
>   		asm volatile (
> @@ -236,11 +236,11 @@ static inline void __riscv_v_vstate_restore(struct __riscv_v_ext_state *restore_
>   			THEAD_VSETVLI_T4X0E8M8D1
>   			THEAD_VLB_V_V0T0
>   			"add		t0, t0, t4\n\t"
> -			THEAD_VLB_V_V0T0
> +			THEAD_VLB_V_V8T0
>   			"add		t0, t0, t4\n\t"
> -			THEAD_VLB_V_V0T0
> +			THEAD_VLB_V_V16T0
>   			"add		t0, t0, t4\n\t"
> -			THEAD_VLB_V_V0T0
> +			THEAD_VLB_V_V24T0
>   			: : "r" (datap) : "memory", "t0", "t4");
>   	} else {
>   		asm volatile (

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