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Message-ID: <20250523104552.32742-5-ziyao@disroot.org> Date: Fri, 23 May 2025 10:45:48 +0000 From: Yao Zi <ziyao@...root.org> To: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Huacai Chen <chenhuacai@...nel.org>, WANG Xuerui <kernel@...0n.name>, Yinbo Zhu <zhuyinbo@...ngson.cn> Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, loongarch@...ts.linux.dev, Mingcong Bai <jeffbai@...c.io>, Kexy Biscuit <kexybiscuit@...c.io>, Yao Zi <ziyao@...root.org> Subject: [PATCH 4/8] clk: loongson2: Allow zero divisors for dividers Loongson 2K0300 and 2K0500 ship divider clocks which allows zero divisors, in which case the divider acts the same as one is specified. Let's pass CLK_DIVIDER_ALLOW_ZERO when registering divider clocks to prepare for future introduction of these clocks. Signed-off-by: Yao Zi <ziyao@...root.org> --- drivers/clk/clk-loongson2.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/clk/clk-loongson2.c b/drivers/clk/clk-loongson2.c index bba97270376c..7a916c7d2718 100644 --- a/drivers/clk/clk-loongson2.c +++ b/drivers/clk/clk-loongson2.c @@ -361,7 +361,8 @@ static int loongson2_clk_probe(struct platform_device *pdev) p->parent_name, 0, clp->base + p->reg_offset, p->div_shift, p->div_width, - CLK_DIVIDER_ONE_BASED, + CLK_DIVIDER_ONE_BASED | + CLK_DIVIDER_ALLOW_ZERO, &clp->clk_lock); break; case CLK_TYPE_GATE: -- 2.49.0
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