linux-kernel - [PATCH V2 0/3] Add level shifter support for qualcomm SOC's

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Message-Id: <20250523105745.6210-1-quic_sartgarg@quicinc.com>
Date: Fri, 23 May 2025 16:27:42 +0530
From: Sarthak Garg <quic_sartgarg@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Ulf Hansson <ulf.hansson@...aro.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org,
        quic_cang@...cinc.com, quic_nguyenb@...cinc.com,
        quic_rampraka@...cinc.com, quic_pragalla@...cinc.com,
        quic_sayalil@...cinc.com, quic_nitirawa@...cinc.com,
        quic_bhaskarv@...cinc.com, Sarthak Garg <quic_sartgarg@...cinc.com>
Subject: [PATCH V2 0/3] Add level shifter support for qualcomm SOC's

Add level shifter support for qualcomm SOC's.

- Changed from v1
    - As suggested by Krzysztof Kozlowski redesigned logic to use
    compatible property for adding this level shifter support.
    - Addressed Adrian Hunter comments on V1 with resepect to
      checkpatch.
    - Cleared the bits first and then set bits in
      sdhci_msm_execute_tuning as suggested by Adrian Hunter.
    - Upated the if condition logic in msm_set_clock_rate_for_bus_mode
      as suggested by Adrian Hunter.

Sarthak Garg (3):
  mmc: sdhci-msm: Enable tuning for SDR50 mode for SD card
  mmc: sdhci-msm: Limit HS mode frequency to 37.5MHz
  arm64: dts: qcom: sm8550: Remove SDR104/SDR50 broken caps

 arch/arm64/boot/dts/qcom/sm8550.dtsi |  3 ---
 drivers/mmc/host/sdhci-msm.c         | 34 ++++++++++++++++++++++++++++
 2 files changed, 34 insertions(+), 3 deletions(-)

-- 
2.17.1