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Message-ID: <20250525101617.1168991-1-suraj.gupta2@amd.com>
Date: Sun, 25 May 2025 15:46:15 +0530
From: Suraj Gupta <suraj.gupta2@....com>
To: <vkoul@...nel.org>, <michal.simek@....com>, <radhey.shyam.pandey@....com>,
<thomas.gessler@...eckmann-gmbh.de>
CC: <dmaengine@...r.kernel.org>, <linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <harini.katakam@....com>
Subject: [PATCH 0/2] Add support to configure irq coalescing count and delay for AXI DMA
Allow AXI DMA client to configure / report coalesce parameters. Client can
fine-tune irq coalescing parameters based on the transfer load.
AXI ethernet driver uses AXI DMA dmaengine driver. Corresponding changes
for AXI ethernet driver to allow irq coalescing configuration / reporting
via ethtool will be sent to net-next with following subject:
"net: xilinx: axienet: Configure and report coalesce parameters in
DMAengine flow"
Suraj Gupta (2):
dmaengine: Add support to configure and read IRQ coalescing parameters
dmaengine: xilinx_dma: Add support to configure/report coalesce
parameters from/to client using AXI DMA
drivers/dma/xilinx/xilinx_dma.c | 62 ++++++++++++++++++++++++++++-----
include/linux/dmaengine.h | 10 ++++++
2 files changed, 64 insertions(+), 8 deletions(-)
--
2.25.1
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