linux-kernel - Re: [PATCH V2] LoongArch: Avoid using $r0/$r1 as "mask" for csrxchg

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Message-ID: <CAHirt9hF8zZUh+mm=XQvPwG56r4RDuqvJ6WVGfKEEivfJSiZig@mail.gmail.com>
Date: Sun, 25 May 2025 10:01:00 +0800
From: WANG Rui <wangrui@...ngson.cn>
To: Huacai Chen <chenhuacai@...ngson.cn>
Cc: Huacai Chen <chenhuacai@...nel.org>, loongarch@...ts.linux.dev, 
	Xuefeng Li <lixuefeng@...ngson.cn>, Guo Ren <guoren@...nel.org>, 
	Xuerui Wang <kernel@...0n.name>, Jiaxun Yang <jiaxun.yang@...goat.com>, 
	linux-kernel@...r.kernel.org, stable@...r.kernel.org, 
	Yanteng Si <si.yanteng@...ux.dev>
Subject: Re: [PATCH V2] LoongArch: Avoid using $r0/$r1 as "mask" for csrxchg

On Sat, May 24, 2025 at 10:24 PM Huacai Chen <chenhuacai@...ngson.cn> wrote:
>
> When building kernel with LLVM there are occasionally such errors:
>
> In file included from ./include/linux/spinlock.h:59:
> In file included from ./include/linux/irqflags.h:17:
> arch/loongarch/include/asm/irqflags.h:38:3: error: must not be $r0 or $r1
>    38 |                 "csrxchg %[val], %[mask], %[reg]\n\t"
>       |                 ^
> <inline asm>:1:16: note: instantiated into assembly here
>     1 |         csrxchg $a1, $ra, 0
>       |                       ^
>
>
> To prevent the compiler from allocating $r0 or $r1 for the "mask" of the
> csrxchg instruction, the 'q' constraint must be used but Clang < 22 does
> not support it. So force to use $t0 in the inline asm, in order to avoid
> using $r0/$r1 while keeping the backward compatibility.

Clang < 21

>
> Cc: stable@...r.kernel.org
> Link: https://github.com/llvm/llvm-project/pull/141037
> Reviewed-by: Yanteng Si <si.yanteng@...ux.dev>
> Suggested-by: WANG Rui <wangrui@...ngson.cn>
> Signed-off-by: Huacai Chen <chenhuacai@...ngson.cn>
> ---
> V2: Update commit messages.
>
>  arch/loongarch/include/asm/irqflags.h | 16 ++++++++++++----
>  1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/arch/loongarch/include/asm/irqflags.h b/arch/loongarch/include/asm/irqflags.h
> index 319a8c616f1f..003172b8406b 100644
> --- a/arch/loongarch/include/asm/irqflags.h
> +++ b/arch/loongarch/include/asm/irqflags.h
> @@ -14,40 +14,48 @@
>  static inline void arch_local_irq_enable(void)
>  {
>         u32 flags = CSR_CRMD_IE;
> +       register u32 mask asm("t0") = CSR_CRMD_IE;
> +
>         __asm__ __volatile__(
>                 "csrxchg %[val], %[mask], %[reg]\n\t"
>                 : [val] "+r" (flags)
> -               : [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)
> +               : [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)
>                 : "memory");
>  }
>
>  static inline void arch_local_irq_disable(void)
>  {
>         u32 flags = 0;
> +       register u32 mask asm("t0") = CSR_CRMD_IE;
> +
>         __asm__ __volatile__(
>                 "csrxchg %[val], %[mask], %[reg]\n\t"
>                 : [val] "+r" (flags)
> -               : [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)
> +               : [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)
>                 : "memory");
>  }
>
>  static inline unsigned long arch_local_irq_save(void)
>  {
>         u32 flags = 0;
> +       register u32 mask asm("t0") = CSR_CRMD_IE;
> +
>         __asm__ __volatile__(
>                 "csrxchg %[val], %[mask], %[reg]\n\t"
>                 : [val] "+r" (flags)
> -               : [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)
> +               : [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)
>                 : "memory");
>         return flags;
>  }
>
>  static inline void arch_local_irq_restore(unsigned long flags)
>  {
> +       register u32 mask asm("t0") = CSR_CRMD_IE;
> +
>         __asm__ __volatile__(
>                 "csrxchg %[val], %[mask], %[reg]\n\t"
>                 : [val] "+r" (flags)
> -               : [mask] "r" (CSR_CRMD_IE), [reg] "i" (LOONGARCH_CSR_CRMD)
> +               : [mask] "r" (mask), [reg] "i" (LOONGARCH_CSR_CRMD)
>                 : "memory");
>  }
>
> --
> 2.47.1
>
>