lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <4f660adb-1cb4-4bcf-9d1c-c13e62818f07@ti.com>
Date: Mon, 26 May 2025 11:02:05 +0530
From: Vignesh Raghavendra <vigneshr@...com>
To: Wadim Egorov <w.egorov@...tec.de>, <nm@...com>, <kristo@...nel.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <upstream@...ts.phytec.de>
Subject: Re: [PATCH] arm64: dts: ti: k3-am642-phyboard-electra: Fix PRU-ICSSG
 Ethernet ports



On 21/05/25 11:03, Wadim Egorov wrote:
> For the ICSSG PHYs to operate correctly, a 25 MHz reference clock must
> be supplied on CLKOUT0. Previously, our bootloader configured this
> clock, which is why the PRU Ethernet ports appeared to work, but the
> change never made it into the device tree.
> 

Should this patch have a Fixes tag then?

> Add clock properties to make EXT_REFCLK1.CLKOUT0 output a 25MHz clock.
> 
> Signed-off-by: Wadim Egorov <w.egorov@...tec.de>
> ---
>  arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
> index f63c101b7d61..129524eb5b91 100644
> --- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
> @@ -322,6 +322,8 @@ AM64X_IOPAD(0x0040, PIN_OUTPUT, 7)	/* (U21) GPMC0_AD1.GPIO0_16 */
>  &icssg0_mdio {
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&icssg0_mdio_pins_default &clkout0_pins_default>;
> +	assigned-clocks = <&k3_clks 157 123>;
> +	assigned-clock-parents = <&k3_clks 157 125>;
>  	status = "okay";
>  
>  	icssg0_phy1: ethernet-phy@1 {

-- 
Regards
Vignesh
https://ti.com/opensource


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ