linux-kernel - Re: [PATCH v3 4/6] arm64: dts: qcom: qcs615: Add IMEM and PIL info region

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Message-ID: <0bd3ec71-f970-47e7-9bbf-60b4f31aac24@quicinc.com>
Date: Mon, 26 May 2025 09:33:23 +0800
From: Lijuan Gao <quic_lijuang@...cinc.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Mathieu Poirier <mathieu.poirier@...aro.org>,
        "Rob
 Herring" <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        "Conor
 Dooley" <conor+dt@...nel.org>,
        Manivannan Sadhasivam
	<manivannan.sadhasivam@...aro.org>,
        Konrad Dybcio <konradybcio@...nel.org>
CC: <kernel@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-remoteproc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 4/6] arm64: dts: qcom: qcs615: Add IMEM and PIL info
 region



在 5/16/2025 5:45 PM, Konrad Dybcio 写道:
> On 5/16/25 5:27 AM, Lijuan Gao wrote:
>> Add a simple-mfd representing IMEM on QCS615 and define the PIL
>> relocation info region as its child. The PIL region in IMEM is used to
>> communicate load addresses of remoteproc to post mortem debug tools, so
>> that these tools can collect ramdumps.
>>
>> Signed-off-by: Lijuan Gao <quic_lijuang@...cinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs615.dtsi | 14 ++++++++++++++
>>   1 file changed, 14 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> index f922349758d11ec7fda1c43736a4bf290916e67f..dd54cfe7b7a6f03c1aa658ce3014d50478df5931 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> @@ -3290,6 +3290,20 @@ sram@...0000 {
>>   			reg = <0x0 0x0c3f0000 0x0 0x400>;
>>   		};
>>   
>> +		sram@...aa000 {
> 
> Please also update this unit address
sure, I will update it in next patch.
> 
> with that
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
> 
> Konrad
> 
>> +			compatible = "qcom,qcs615-imem", "syscon", "simple-mfd";
>> +			reg = <0x0 0x14680000 0x0 0x2c000>;
>> +			ranges = <0 0 0x14680000 0x2c000>;
>> +
>> +			#address-cells = <1>;
>> +			#size-cells = <1>;
>> +
>> +			pil-reloc@...4c {
>> +				compatible = "qcom,pil-reloc-info";
>> +				reg = <0x2a94c 0xc8>;
>> +			};
>> +		};
>> +
>>   		apps_smmu: iommu@...00000 {
>>   			compatible = "qcom,qcs615-smmu-500", "qcom,smmu-500", "arm,mmu-500";
>>   			reg = <0x0 0x15000000 0x0 0x80000>;
>>

-- 
Thx and BRs
Lijuan Gao