linux-kernel - [PATCH v4 2/4] dt-bindings: soc: spacemit: Add K1 MBUS controller

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Message-Id: <20250526-b4-k1-dwc3-v3-v4-2-63e4e525e5cb@whut.edu.cn>
Date: Mon, 26 May 2025 22:40:18 +0800
From: Ze Huang <huangze@...t.edu.cn>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>, 
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, Yixun Lan <dlan@...too.org>, 
 Thinh Nguyen <Thinh.Nguyen@...opsys.com>, 
 Philipp Zabel <p.zabel@...gutronix.de>, 
 Paul Walmsley <paul.walmsley@...ive.com>, 
 Palmer Dabbelt <palmer@...belt.com>, Albert Ou <aou@...s.berkeley.edu>, 
 Alexandre Ghiti <alex@...ti.fr>
Cc: linux-usb@...r.kernel.org, devicetree@...r.kernel.org, 
 linux-riscv@...ts.infradead.org, spacemit@...ts.linux.dev, 
 linux-kernel@...r.kernel.org, Ze Huang <huangze@...t.edu.cn>
Subject: [PATCH v4 2/4] dt-bindings: soc: spacemit: Add K1 MBUS controller

Some devices on the SpacemiT K1 SoC perform DMA through a memory bus
(MBUS) that is not their immediate parent in the device tree. This bus
uses a different address mapping than the CPU.

To express this topology properly, devices are expected to use the
interconnects with name "dma-mem" to reference the MBUS controller.

Signed-off-by: Ze Huang <huangze@...t.edu.cn>
---
 .../bindings/soc/spacemit/spacemit,k1-mbus.yaml    | 55 ++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-mbus.yaml b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-mbus.yaml
new file mode 100644
index 0000000000000000000000000000000000000000..533cf99dff689cf55a159118c32a676054294ffa
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/spacemit/spacemit,k1-mbus.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/soc/spacemit/spacemit,k1-mbus.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: SpacemiT Memory Bus controller
+
+maintainers:
+  - Ze Huang <huangze9015@...il.com>
+
+description: |
+  On the SpacemiT K1 SoC, some devices do not perform DMA through their
+  immediate parent node in the device tree. Instead, they access memory
+  through a separate memory bus (MBUS) that uses a different address
+  mapping from the CPU.
+
+  To correctly describe the DMA path, such devices must reference the MBUS
+  controller through an interconnect with the reserved name "dma-mem".
+
+properties:
+  compatible:
+    const: spacemit,k1-mbus
+
+  reg:
+    maxItems: 1
+
+  dma-ranges:
+    maxItems: 1
+
+  "#address-cells": true
+
+  "#size-cells": true
+
+  "#interconnect-cells":
+    const: 0
+
+required:
+  - compatible
+  - reg
+  - dma-ranges
+  - "#interconnect-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    dram-controller@0 {
+        compatible = "spacemit,k1-mbus";
+        reg = <0x00000000 0x80000000>;
+        dma-ranges = <0x00000000 0x00000000 0x80000000>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+        #interconnect-cells = <0>;
+    };

-- 
2.49.0