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Message-ID: <20250526153821.7918-5-quic_nitirawa@quicinc.com>
Date: Mon, 26 May 2025 21:08:15 +0530
From: Nitin Rawat <quic_nitirawa@...cinc.com>
To: vkoul@...nel.org, kishon@...nel.org, manivannan.sadhasivam@...aro.org,
James.Bottomley@...senPartnership.com, martin.petersen@...cle.com,
bvanassche@....org, andersson@...nel.org, neil.armstrong@...aro.org,
konrad.dybcio@....qualcomm.com, dmitry.baryshkov@....qualcomm.com
Cc: quic_rdwivedi@...cinc.com, quic_cang@...cinc.com,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-scsi@...r.kernel.org,
Nitin Rawat <quic_nitirawa@...cinc.com>
Subject: [PATCH V6 04/10] phy: qcom-qmp-ufs: Refactor phy_power_on and phy_calibrate callbacks
Commit 052553af6a31 ("ufs/phy: qcom: Refactor to use phy_init call")
puts enabling regulators & clks, calibrating UFS PHY, starting serdes
and polling PCS ready status into phy_power_on.
In Current code regulators enable, clks enable, calibrating UFS PHY,
start_serdes and polling PCS_ready_status are part of phy_power_on.
UFS PHY registers are retained after power collapse, meaning calibrating
UFS PHY, start_serdes and polling PCS_ready_status can be done only when
hba is powered_on, and not needed every time when phy_power_on is called
during resume. Hence keep the code which enables PHY's regulators & clks
in phy_power_on and move the rest steps into phy_calibrate function.
Refactor the code to retain PHY regulators & clks in phy_power_on and
move out rest of the code to new phy_calibrate function.
Also move reset_control_assert to qmp_ufs_phy_calibrate to align
with Hardware programming guide.
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Co-developed-by: Can Guo <quic_cang@...cinc.com>
Signed-off-by: Can Guo <quic_cang@...cinc.com>
Signed-off-by: Nitin Rawat <quic_nitirawa@...cinc.com>
---
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 26 ++++++-------------------
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
index a67cf0a64f74..ade8e9c4b9ae 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
@@ -1797,7 +1797,7 @@ static int qmp_ufs_com_exit(struct qmp_ufs *qmp)
return 0;
}
-static int qmp_ufs_init(struct phy *phy)
+static int qmp_ufs_power_on(struct phy *phy)
{
struct qmp_ufs *qmp = phy_get_drvdata(phy);
const struct qmp_phy_cfg *cfg = qmp->cfg;
@@ -1825,10 +1825,6 @@ static int qmp_ufs_init(struct phy *phy)
return ret;
}
}
-
- ret = reset_control_assert(qmp->ufs_reset);
- if (ret)
- return ret;
}
ret = qmp_ufs_com_init(qmp);
@@ -1847,6 +1843,10 @@ static int qmp_ufs_phy_calibrate(struct phy *phy)
unsigned int val;
int ret;
+ ret = reset_control_assert(qmp->ufs_reset);
+ if (ret)
+ return ret;
+
qmp_ufs_init_registers(qmp, cfg);
ret = reset_control_deassert(qmp->ufs_reset);
@@ -1899,21 +1899,6 @@ static int qmp_ufs_exit(struct phy *phy)
return 0;
}
-static int qmp_ufs_power_on(struct phy *phy)
-{
- int ret;
-
- ret = qmp_ufs_init(phy);
- if (ret)
- return ret;
-
- ret = qmp_ufs_phy_calibrate(phy);
- if (ret)
- qmp_ufs_exit(phy);
-
- return ret;
-}
-
static int qmp_ufs_disable(struct phy *phy)
{
int ret;
@@ -1943,6 +1928,7 @@ static int qmp_ufs_set_mode(struct phy *phy, enum phy_mode mode, int submode)
static const struct phy_ops qcom_qmp_ufs_phy_ops = {
.power_on = qmp_ufs_power_on,
.power_off = qmp_ufs_disable,
+ .calibrate = qmp_ufs_phy_calibrate,
.set_mode = qmp_ufs_set_mode,
.owner = THIS_MODULE,
};
--
2.48.1
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