linux-kernel - Re: [PATCH 2/3] dt-bindings: PCI: pci-ep: Extend max-link-speed to PCIe Gen5/Gen6

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Message-ID: <174837457636.1106584.5849030626221512750.robh@kernel.org>
Date: Tue, 27 May 2025 14:36:25 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Hans Zhang <18255117159@....com>
Cc: kw@...ux.com, krzk+dt@...nel.org, linux-pci@...r.kernel.org,
	linux-kernel@...r.kernel.org, lpieralisi@...nel.org,
	bhelgaas@...gle.com, manivannan.sadhasivam@...aro.org,
	conor+dt@...nel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 2/3] dt-bindings: PCI: pci-ep: Extend max-link-speed to
 PCIe Gen5/Gen6


On Tue, 20 May 2025 00:04:47 +0800, Hans Zhang wrote:
> Update the PCI Endpoint (EP) device tree binding documentation to
> include PCIe Gen5 and Gen6 support for the `max-link-speed` property.
> Similar to the Host Controller binding, the original EP binding
> limited this value to 1~4 (Gen1~Gen4). With current SOCs requiring
> Gen5/Gen6 support (e.g., Synopsys/Cadence IP), this change aligns
> the EP binding with the kernel's PCIe 6.0 capabilities.
> 
> Signed-off-by: Hans Zhang <18255117159@....com>
> ---
>  Documentation/devicetree/bindings/pci/pci-ep.yaml | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 

Acked-by: Rob Herring (Arm) <robh@...nel.org>