linux-kernel - Re: [PATCH v5 3/4] dt-bindings: display: bridge: renesas,dsi: Add support for RZ/V2H(P) SoC

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Message-ID: <CA+V-a8u7PBz31L+b=x8+B_yXCRzOC351PArw02rx+yYNidT2OQ@mail.gmail.com>
Date: Tue, 27 May 2025 23:04:40 +0100
From: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Andrzej Hajda <andrzej.hajda@...el.com>, Neil Armstrong <neil.armstrong@...aro.org>, 
	Robert Foss <rfoss@...nel.org>, Laurent Pinchart <Laurent.pinchart@...asonboard.com>, 
	Jonas Karlman <jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>, 
	David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>, 
	Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>, 
	Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Biju Das <biju.das.jz@...renesas.com>, Magnus Damm <magnus.damm@...il.com>, 
	dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org, 
	linux-clk@...r.kernel.org, Fabrizio Castro <fabrizio.castro.jz@...esas.com>, 
	Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>, 
	Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH v5 3/4] dt-bindings: display: bridge: renesas,dsi: Add
 support for RZ/V2H(P) SoC

Hi Geert,

Thank you for the review.

On Fri, May 23, 2025 at 3:58 PM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
>
> Hi Prabhakar,
>
> On Mon, 12 May 2025 at 20:43, Prabhakar <prabhakar.csengg@...il.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > The MIPI DSI interface on the RZ/V2H(P) SoC is nearly identical to that of
> > the RZ/G2L SoC. While the LINK registers are the same for both SoCs, the
> > D-PHY registers differ. Additionally, the number of resets for DSI on
> > RZ/V2H(P) is two compared to three on the RZ/G2L.
> >
> > To accommodate these differences, a SoC-specific
> > `renesas,r9a09g057-mipi-dsi` compatible string has been added for the
> > RZ/V2H(P) SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
>
> Thanks for your patch!
>
> > --- a/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
> > +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dsi.yaml
> > @@ -14,16 +14,17 @@ description: |
> >    RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
> >    up to four data lanes.
> >
> > -allOf:
> > -  - $ref: /schemas/display/dsi-controller.yaml#
> > -
> >  properties:
> >    compatible:
> > -    items:
> > +    oneOf:
> >        - enum:
> > -          - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
> > -          - renesas,r9a07g054-mipi-dsi # RZ/V2L
> > -      - const: renesas,rzg2l-mipi-dsi
> > +          - renesas,r9a09g057-mipi-dsi # RZ/V2H(P)
>
> Nit: I would add the new entry after all the old entries, to preserve
> sort order (by part number).
>
I'll move that later to preserve the sort order in the next version.

Cheers,
Prabhakar

> > +
> > +      - items:
> > +          - enum:
> > +              - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
> > +              - renesas,r9a07g054-mipi-dsi # RZ/V2L
> > +          - const: renesas,rzg2l-mipi-dsi
> >
> >    reg:
> >      maxItems: 1
>
> The rest LGTM, so
> Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds