linux-kernel - Re: [PATCH v3 08/12] arm64: dts: qcom: sm4250: add description of soundwire and dmic pins

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Message-Id: <DA72FVL1VA1K.1MS0NMPR9PJ87@linaro.org>
Date: Tue, 27 May 2025 16:59:00 +0100
From: "Alexey Klimov" <alexey.klimov@...aro.org>
To: "Konrad Dybcio" <konrad.dybcio@....qualcomm.com>, "Srinivas Kandagatla"
 <srini@...nel.org>, "Mark Brown" <broonie@...nel.org>,
 <linux-sound@...r.kernel.org>
Cc: "Liam Girdwood" <lgirdwood@...il.com>, "Rob Herring" <robh@...nel.org>,
 "Krzysztof Kozlowski" <krzk+dt@...nel.org>, "Krzysztof Kozlowski"
 <krzysztof.kozlowski@...aro.org>, "Conor Dooley" <conor+dt@...nel.org>,
 "Bjorn Andersson" <andersson@...nel.org>, "Dmitry Baryshkov"
 <lumag@...nel.org>, "Konrad Dybcio" <konradybcio@...nel.org>, "Jaroslav
 Kysela" <perex@...ex.cz>, "Takashi Iwai" <tiwai@...e.com>,
 <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
 <linux-kernel@...r.kernel.org>, <linux-gpio@...r.kernel.org>
Subject: Re: [PATCH v3 08/12] arm64: dts: qcom: sm4250: add description of
 soundwire and dmic pins

On Thu May 22, 2025 at 7:12 PM BST, Konrad Dybcio wrote:
> On 5/22/25 7:40 PM, Alexey Klimov wrote:
>> Adds data and clock pins description (their active state) of
>> soundwire masters and onboard DMIC.
>> 
>> Cc: Srinivas Kandagatla <srinivas.kandagatla@...aro.org>
>> Signed-off-by: Alexey Klimov <alexey.klimov@...aro.org>
>> ---
>>  arch/arm64/boot/dts/qcom/sm4250.dtsi | 62 ++++++++++++++++++++++++++++++++++++
>>  1 file changed, 62 insertions(+)
>> 
>> diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qcom/sm4250.dtsi
>> index cd8c8e59976e5dc4b48d0e14566cf142895711d5..723391ba9aa21d84ba2dda23932c20bd048fbe80 100644
>> --- a/arch/arm64/boot/dts/qcom/sm4250.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi
>> @@ -37,10 +37,36 @@ &cpu7 {
>>  	compatible = "qcom,kryo240";
>>  };
>>  
>> +&swr0 {
>> +	pinctrl-0 = <&lpass_tx_swr_active>;
>> +	pinctrl-names = "default";
>> +};
>> +
>> +&swr1 {
>> +	pinctrl-0 = <&lpass_rx_swr_active>;
>> +	pinctrl-names = "default";
>> +};
>> +
>>  &lpass_tlmm {
>>  	compatible = "qcom,sm4250-lpass-lpi-pinctrl";
>>  	gpio-ranges = <&lpass_tlmm 0 0 27>;
>>  
>> +	lpass_dmic01_active: lpass-dmic01-active-state {
>> +		clk-pins {
>> +			pins = "gpio6";
>> +			function = "dmic01_clk";
>> +			drive-strength = <8>;
>> +			output-high;
>> +		};
>> +
>> +		data-pins {
>> +			pins = "gpio7";
>> +			function = "dmic01_data";
>> +			drive-strength = <8>;
>> +			input-enable;
>> +		};
>
> Other SoCs put these in the common dtsi

which seems to be sm4250.dtsi in this case unless I am missing something.

Thanks,
Alexey