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Message-ID: <jzxu6mcbxf5zwyirnb2jjpm2i7sln3v5mz3gyhc5xhpqexicvb@atrcjvh7wuh5>
Date: Tue, 27 May 2025 18:12:51 +0200
From: Uwe Kleine-König <ukleinek@...nel.org>
To: Chris Packham <chris.packham@...iedtelesis.co.nz>
Cc: jdelvare@...e.com, linux@...ck-us.net, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, linux-hwmon@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-pwm@...r.kernel.org
Subject: Re: [PATCH v7 1/3] dt-bindings: hwmon: Add adt7475 fan/pwm properties
Hello,
On Tue, Jul 23, 2024 at 10:17:35AM +1200, Chris Packham wrote:
> Add fan child nodes that allow describing the connections for the
> ADT7475 to the fans it controls. This also allows setting some
> initial values for the pwm duty cycle and frequency.
>
> Signed-off-by: Chris Packham <chris.packham@...iedtelesis.co.nz>
> Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
> ---
>
> Notes:
> Changes in v7:
> - None
> Changes in v6:
> - Collect r-by from Rob
> Changes in v5:
> - Use nanoseconds for PWM frequency and duty cycle as per existing
> conventions for PWMs
> - Set flags to 0 in example to match adi,pwm-active-state setting
> Changes in v4:
> - 0 is not a valid frequency value
> Changes in v3:
> - Use the pwm provider/consumer bindings
> Changes in v2:
> - Document 0 as a valid value (leaves hardware as-is)
>
> .../devicetree/bindings/hwmon/adt7475.yaml | 35 ++++++++++++++++++-
> 1 file changed, 34 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/hwmon/adt7475.yaml b/Documentation/devicetree/bindings/hwmon/adt7475.yaml
> index 051c976ab711..df2b5b889e4d 100644
> --- a/Documentation/devicetree/bindings/hwmon/adt7475.yaml
> +++ b/Documentation/devicetree/bindings/hwmon/adt7475.yaml
> @@ -51,6 +51,24 @@ properties:
> enum: [0, 1]
> default: 1
>
> + "#pwm-cells":
> + const: 4
I asked to add support for #pwm-cells = <4> to the pwm core in reply to
v4 (see
https://lore.kernel.org/linux-pwm/drqvaon5lb2ei3jqofutbr6demibyfdhbmr24sva27gzpqdnon@fxa7rpl33iih/).
I'm unhappy to see this merged anyhow in combination with ad-hoc parsing
of the pwm properties in the driver :-\
> + description: |
> + Number of cells in a PWM specifier.
> + - 0: The PWM channel
> + - 1: The PWM period in nanoseconds
> + - 90909091 (11 Hz)
> + - 71428571 (14 Hz)
> + - 45454545 (22 Hz)
> + - 34482759 (29 Hz)
> + - 28571429 (35 Hz)
> + - 22727273 (44 Hz)
> + - 17241379 (58 Hz)
> + - 11363636 (88 Hz)
> + - 44444 (22 kHz)
> + - 2: PWM flags 0 or PWM_POLARITY_INVERTED
> + - 3: The default PWM duty cycle in nanoseconds
> +
Best regards
Uwe
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