linux-kernel - [PATCH 2/2] crypto: octeontx2: get engine group number for asymmetric engine

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <20250528145941.2659706-3-amitsinght@marvell.com>
Date: Wed, 28 May 2025 20:29:41 +0530
From: Amit Singh Tomar <amitsinght@...vell.com>
To: Srujana Challa <schalla@...vell.com>,
        Bharat Bhushan
	<bbhushan2@...vell.com>,
        Herbert Xu <herbert@...dor.apana.org.au>,
        "David S.
 Miller" <davem@...emloft.net>,
        Amit Singh Tomar <amitsinght@...vell.com>,
        Kuan-Wei Chiu <visitorckw@...il.com>,
        Peter Zijlstra <peterz@...radead.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Philipp Stanner <pstanner@...hat.com>,
        Shashank Gupta <shashankg@...vell.com>, <linux-crypto@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, Tanmay Jagdale <tanmay@...vell.com>
Subject: [PATCH 2/2] crypto: octeontx2: get engine group number for asymmetric engine

Cryptographic Accelerator Unit (CPT) support different engine groups, one
for asymmetric algorithms (only AE engines in this group), one for the
most common symmetric algorithms (all SE and all IE engines in this group),
and one for other symmetric algorithms (only SE engines in this group).

For symmetric engine (SE), we obtain the group number using
"MBOX_MSG_GET_ENG_GRP_NUM" mailbox. Let's follow a similar approach to
determine the group number for asymmetric engine (AE).

Signed-off-by: Amit Singh Tomar <amitsinght@...vell.com>
---
 drivers/crypto/marvell/octeontx2/otx2_cptlf.h   |  1 +
 .../crypto/marvell/octeontx2/otx2_cptvf_main.c  | 17 ++++++++++++++++-
 .../crypto/marvell/octeontx2/otx2_cptvf_mbox.c  |  2 ++
 .../marvell/octeontx2/otx2_cptvf_reqmgr.c       |  2 ++
 4 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptlf.h b/drivers/crypto/marvell/octeontx2/otx2_cptlf.h
index 49ec2b92e86d..1b9f75214d18 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cptlf.h
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptlf.h
@@ -125,6 +125,7 @@ struct otx2_cptlfs_info {
 	u8 are_lfs_attached;	/* Whether CPT LFs are attached */
 	u8 lfs_num;		/* Number of CPT LFs */
 	u8 kcrypto_se_eng_grp_num; /* Crypto symmetric engine group number */
+	u8 kcrypto_ae_eng_grp_num; /* Crypto asymmetric engine group number */
 	u8 kvf_limits;          /* Kernel crypto limits */
 	atomic_t state;         /* LF's state. started/reset */
 	int blkaddr;            /* CPT blkaddr: BLKADDR_CPT0/BLKADDR_CPT1 */
diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c b/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c
index 79adc224066e..c1c44a7b89fa 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptvf_main.c
@@ -276,7 +276,22 @@ static int cptvf_lf_init(struct otx2_cptvf_dev *cptvf)
 			"Symmetric Engine group for crypto not available\n");
 		return -ENOENT;
 	}
-	eng_grp_msk = 1 << cptvf->lfs.kcrypto_se_eng_grp_num;
+
+	/* Get engine group number for asymmetric crypto */
+	cptvf->lfs.kcrypto_ae_eng_grp_num = OTX2_CPT_INVALID_CRYPTO_ENG_GRP;
+	ret = otx2_cptvf_send_eng_grp_num_msg(cptvf, OTX2_CPT_AE_TYPES);
+	if (ret)
+		return ret;
+
+	if (cptvf->lfs.kcrypto_ae_eng_grp_num ==
+		OTX2_CPT_INVALID_CRYPTO_ENG_GRP) {
+		dev_err(dev,
+			"Asymmetric Engine group for crypto not available\n");
+		return -ENOENT;
+	}
+
+	eng_grp_msk = BIT(cptvf->lfs.kcrypto_se_eng_grp_num) |
+		      BIT(cptvf->lfs.kcrypto_ae_eng_grp_num);
 
 	ret = otx2_cptvf_send_kvf_limits_msg(cptvf);
 	if (ret)
diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c b/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c
index f36d75f40014..3078e2375d3b 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptvf_mbox.c
@@ -126,6 +126,8 @@ static void process_pfvf_mbox_mbox_msg(struct otx2_cptvf_dev *cptvf,
 		grp_num = rsp_grp->eng_grp_num;
 		if (rsp_grp->eng_type == OTX2_CPT_SE_TYPES)
 			cptvf->lfs.kcrypto_se_eng_grp_num = grp_num;
+		else if (rsp_grp->eng_type == OTX2_CPT_AE_TYPES)
+			cptvf->lfs.kcrypto_ae_eng_grp_num = grp_num;
 		break;
 	case MBOX_MSG_GET_KVF_LIMITS:
 		rsp_limits = (struct otx2_cpt_kvf_limits_rsp *) msg;
diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptvf_reqmgr.c b/drivers/crypto/marvell/octeontx2/otx2_cptvf_reqmgr.c
index 8b4ac269330a..e71494486c64 100644
--- a/drivers/crypto/marvell/octeontx2/otx2_cptvf_reqmgr.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptvf_reqmgr.c
@@ -399,6 +399,8 @@ int otx2_cpt_get_eng_grp_num(struct pci_dev *pdev,
 	switch (eng_type) {
 	case OTX2_CPT_SE_TYPES:
 		return cptvf->lfs.kcrypto_se_eng_grp_num;
+	case OTX2_CPT_AE_TYPES:
+		return cptvf->lfs.kcrypto_ae_eng_grp_num;
 	default:
 		dev_err(&cptvf->pdev->dev, "Unsupported engine type");
 		break;
-- 
2.48.1