linux-kernel - [PATCH v1 4/9] dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller

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Message-Id: <20250528085451.481267-1-yangzh0906@thundersoft.com>
Date: Wed, 28 May 2025 16:54:51 +0800
From: Albert Yang <yangzh0906@...ndersoft.com>
To: Ulf Hansson <ulf.hansson@...aro.org>,
	Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Ge Gordon <gordon.ge@....ai>
Cc: BST Linux Kernel Upstream Group <bst-upstream@...ai.top>,
	linux-arm-kernel@...ts.infradead.org,
	linux-mmc@...r.kernel.org,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Albert Yang <yangzh0906@...ndersoft.com>
Subject: [PATCH v1 4/9] dt-bindings: mmc: add binding for BST DWCMSHC SDHCI controller

Add device tree binding documentation for the Black Sesame Technologies
(BST) DWCMSHC SDHCI controller.

This binding describes the required and optional properties for the
bst,dwcmshc-sdhci compatible controller, including register layout,
interrupts, bus width, clock configuration, and other controller-specific
features.

Signed-off-by: Ge Gordon <gordon.ge@....ai>
Signed-off-by: Albert Yang <yangzh0906@...ndersoft.com>
---
 .../bindings/mmc/bst,dwcmshc-sdhci.yaml       | 115 ++++++++++++++++++
 1 file changed, 115 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yaml

diff --git a/Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yaml b/Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yaml
new file mode 100644
index 000000000000..429e7f50cdec
--- /dev/null
+++ b/Documentation/devicetree/bindings/mmc/bst,dwcmshc-sdhci.yaml
@@ -0,0 +1,115 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mmc/bst,dwcmshc-sdhci.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Black Sesame Technologies DWCMSHC SDHCI Controller
+
+maintainers:
+  - Ge Gordon <gordon.ge@....ai>
+
+description: |
+  The BST DWCMSHC SDHCI controller is a Synopsys DesignWare Mobile Storage Host
+  Controller IP integrated in BST SoCs.
+
+  This documents the differences between the core properties in mmc.yaml and the
+  properties used by the sdhci-bst driver.
+
+properties:
+  compatible:
+    const: bst,dwcmshc-sdhci
+
+  reg-names:
+    const: base
+    description: Specify the register name
+
+  reg:
+    maxItems: 1
+    description: Host controller base address
+
+  interrupts:
+    maxItems: 1
+    description: One MMC interrupt should be described here
+
+  interrupt-names:
+    items:
+      - const: IRQDWMMC0
+
+  non-removable:
+    type: boolean
+    description: Non-removable slot (like eMMC)
+
+  bus-width:
+    description: Number of data lines
+    enum: [1, 4, 8]
+
+  clock-frequency:
+    description: Base clock frequency in Hz
+
+  max-frequency:
+    description: Maximum clock frequency in Hz
+
+  fifo-depth:
+    description: |
+      FIFO depth in bytes. If this property is not specified, the default value
+      of the fifo size is determined from the controller registers.
+
+  mmc_crm_base:
+    description: Base address of MMC CRM registers
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  mmc_crm_size:
+    description: Size of MMC CRM registers
+    $ref: /schemas/types.yaml#/definitions/uint32
+
+  memory-region:
+    maxItems: 1
+    description: Specify the MMC DMA buffer range
+
+  sdhci,auto-cmd12:
+    type: boolean
+    description: Enable auto CMD12 support
+
+  dma-coherent:
+    type: boolean
+    description: Enable coherent DMA operations
+
+required:
+  - compatible
+  - reg-names
+  - reg
+  - interrupts
+  - interrupt-names
+  - non-removable
+  - bus-width
+  - clock-frequency
+  - max-frequency
+  - fifo-depth
+  - mmc_crm_base
+  - mmc_crm_size
+
+examples:
+  - |
+    dwmmc0@...00000 {
+        status = "okay";
+        compatible = "bst,dwcmshc-sdhci";
+        reg-names = "base";
+        reg = <0x0 0x22200000 0x0 0x1000>;
+        interrupts = <0x0 0x90 0x4>;
+        interrupt-names = "IRQDWMMC0";
+        #address-cells = <0x2>;
+        #size-cells = <0x0>;
+        clock-frequency = <200000000>;
+        max-frequency = <200000000>;
+        mmc_crm_base = <0x23006000>;
+        mmc_crm_size = <0x1000>;
+        fifo-depth = <0x400>;
+        bus-width = <8>;
+        non-removable;
+        sdhci,auto-cmd12;
+        dma-coherent;
+        memory-region = <&mmc_dma_buf>;
+    };
+
+additionalProperties: true
\ No newline at end of file
-- 
2.25.1