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Message-ID: <0c87223d-4b4e-4e82-b7ed-3c694393b1b0@kernel.org>
Date: Thu, 29 May 2025 11:05:59 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Yingchao Deng <quic_yingdeng@...cinc.com>,
 Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: qcom: Add coresight node for SM8650

On 29/05/2025 10:56, Yingchao Deng wrote:
> Add coresight components on the path from stm to etr.
> 
> Signed-off-by: Yingchao Deng <quic_yingdeng@...cinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sm8650.dtsi | 250 +++++++++++++++++++++++++++
>  1 file changed, 250 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 86684cb9a932..5e1854a0e15f 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -5052,6 +5052,82 @@ data-pins {
>  			};
>  		};
>  
> +		ctcu@...01000 {
> +			compatible = "qcom,sa8775p-ctcu";

Wrong compatible.

> +			reg = <0x0 0x10001000 0x0 0x1000>;
> +
> +			clocks = <&aoss_qmp>;
> +			clock-names = "apb";
> +
> +			in-ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +					ctcu_in0: endpoint {
> +					remote-endpoint = <&etr0_out>;

Fix indentation.

> +					};
> +				};
> +
> +				port@1 {
> +					reg = <1>;
> +					ctcu_in1: endpoint {
> +					remote-endpoint = <&etr1_out>;
> +					};
> +				};
> +			};
> +		};
> +
> +		stm@...02000 {
> +			compatible = "arm,coresight-stm", "arm,primecell";
> +			reg = <0x0 0x10002000 0x0 0x1000>,
> +				<0x0 0x16280000 0x0 0x180000>;
> +			reg-names = "stm-base", "stm-stimulus-base";
> +
> +			clocks = <&aoss_qmp>;
> +			clock-names = "apb_pclk";
> +
> +			out-ports {
> +				port {
> +					stm_out_funnel_in0: endpoint {
> +						remote-endpoint =
> +						<&funnel_in0_in_stm>;
> +					};
> +				};
> +			};
> +		};
> +
> +		funnel@...41000 {
> +			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +			reg = <0x0 0x10041000 0x0 0x1000>;
> +
> +			clocks = <&aoss_qmp>;
> +			clock-names = "apb_pclk";
> +
> +			in-ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@7 {
> +					reg = <7>;
> +					funnel_in0_in_stm: endpoint {
> +						remote-endpoint =
> +						<&stm_out_funnel_in0>;
> +					};
> +				};
> +			};
> +
> +			out-ports {
> +				port {
> +					funnel_in0_out_funnel_qdss: endpoint {
> +						remote-endpoint =
> +						<&funnel_qdss_in_funnel_in0>;
> +					};
> +				};
> +			};
> +		};
> +
>  		funnel@...42000 {
>  			compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>  
> @@ -5094,6 +5170,14 @@ in-ports {
>  				#address-cells = <1>;
>  				#size-cells = <0>;
>  
> +				port@0 {
> +					reg = <0>;
> +
> +					funnel_qdss_in_funnel_in0: endpoint {
> +						remote-endpoint = <&funnel_in0_out_funnel_qdss>;
> +					};
> +				};
> +
>  				port@1 {
>  					reg = <1>;
>  
> @@ -5112,6 +5196,133 @@ funnel_qdss_out_funnel_aoss: endpoint {
>  			};
>  		};
>  
> +		replicator@...46000 {
> +			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> +			reg = <0x0 0x10046000 0x0 0x1000>;
> +
> +			clocks = <&aoss_qmp>;
> +			clock-names = "apb_pclk";
> +
> +			in-ports {
> +				port {
> +					replicator_qdss_in_replicator_swao: endpoint {
> +						remote-endpoint =
> +						<&replicator_swao_out_replicator_qdss>;
> +					};
> +				};
> +			};
> +
> +			out-ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					replicator_qdss_out_replicator_etr: endpoint {
> +						remote-endpoint =
> +						<&replicator_etr_in_replicator_qdss>;
> +					};
> +				};
> +			};
> +		};
> +
> +		tmc@...48000 {
> +			compatible = "arm,coresight-tmc", "arm,primecell";
> +			reg = <0x0 0x10048000 0x0 0x1000>;
> +
> +			iommus = <&apps_smmu 0x04e0 0>,
> +				<&apps_smmu 0x04c0 0>;
> +			dma-coherent;
> +			arm,scatter-gather;
> +
> +			clocks = <&aoss_qmp>;
> +			clock-names = "apb_pclk";
> +
> +			in-ports {
> +				port {
> +					tmc_etr_in_replicator_etr: endpoint {
> +						remote-endpoint =
> +						<&replicator_etr_out_tmc_etr>;
> +					};
> +				};
> +			};
> +
> +			out-ports {
> +				port {
> +					etr0_out: endpoint {
> +						remote-endpoint =
> +						<&ctcu_in0>;
> +					};
> +				};
> +			};
> +		};
> +
> +		replicator@...4e000 {
> +			compatible = "arm,coresight-dynamic-replicator", "arm,primecell";
> +			reg = <0x0 0x1004e000 0x0 0x1000>;
> +
> +			clocks = <&aoss_qmp>;
> +			clock-names = "apb_pclk";
> +
> +			in-ports {
> +				port {
> +					replicator_etr_in_replicator_qdss: endpoint {
> +						remote-endpoint =
> +						<&replicator_qdss_out_replicator_etr>;
> +					};
> +				};
> +			};
> +
> +			out-ports {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				port@0 {
> +					reg = <0>;
> +					replicator_etr_out_tmc_etr: endpoint {
> +						remote-endpoint =
> +						<&tmc_etr_in_replicator_etr>;
> +					};
> +				};
> +				port@1 {
> +					reg = <1>;
> +					replicator_etr_out_tmc_etr1: endpoint {
> +						remote-endpoint =
> +						<&tmc_etr1_in_replicator_etr>;
> +					};
> +				};
> +			};
> +		};
> +
> +		tmc@...4f000 {
> +			compatible = "arm,primecell";

That's also wrong.

Plus I suspect this was not tested against bindings.

Best regards,
Krzysztof

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