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Message-ID: <m3v7pj6a6j.fsf@t19.piap.pl>
Date: Thu, 29 May 2025 11:25:08 +0200
From: Krzysztof Hałasa <khalasa@...p.pl>
To: Sébastien Szymanski <sebastien.szymanski@...adeus.com>
Cc: Jacopo Mondi <jacopo.mondi@...asonboard.com>,  Laurent Pinchart
 <laurent.pinchart@...asonboard.com>,  Rui Miguel Silva <rmfrfs@...il.com>,
  Martin Kepplinger <martink@...teo.de>,  Purism Kernel Team
 <kernel@...i.sm>,  Mauro Carvalho Chehab <mchehab@...nel.org>,  Shawn Guo
 <shawnguo@...nel.org>,  Sascha Hauer <s.hauer@...gutronix.de>,
  Pengutronix Kernel Team <kernel@...gutronix.de>,  Fabio Estevam
 <festevam@...il.com>,  <linux-media@...r.kernel.org>,
  <imx@...ts.linux.dev>,  <linux-arm-kernel@...ts.infradead.org>,
  <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] Enable MIPI filtering by DT on i.MX8M*

Hi Sébastien,

Sébastien Szymanski <sebastien.szymanski@...adeus.com> writes:

> On i.MX8MM mipi_csi is at 32e30000. NXP kernel (6.12.3) with ov5640 camera:
>
> # devmem 0x32E30000 32
> 0x03060301

Thanks a lot. So at least the version register is the same as on
i.MX8MP.
I wonder if you could test if the CSIC possibly supports filtering by
DT.

How would such a test be performed?

Maybe: while streaming (otherwise the system may lock up):

I assume 'devmem 0x32E30004 32' shows 0x4305.
# devmem 0x32E30004 32 0x14705

and:
- does it change anything? If the streaming stops, you may try
  restarting and writing with devmem again - writing to this register
  directly frequently stops streaming on my 8MP.

- what does the register contain after write?

- you may also try:
  # devmem 0x32E30004 32 0xfffffffd
  # devmem 0x32E30004 32

On i.MX8MP the above returns:
# ./devmem write32 0x32Ex0004 0xfffffffd
# ./devmem read32 0x32Ex0004
0x0000FF05
(and the streaming still works, usually).

The above is not a very good test, I admit, but it may show 8MM really
doesn't have those/that bit.

TIA.
-- 
Krzysztof "Chris" Hałasa

Sieć Badawcza Łukasiewicz
Przemysłowy Instytut Automatyki i Pomiarów PIAP
Al. Jerozolimskie 202, 02-486 Warszawa

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