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Message-ID: <ebff3706-9c8d-4545-952c-af6a8b31472b@altera.com>
Date: Thu, 29 May 2025 09:17:21 -0700
From: Matthew Gerlach <matthew.gerlach@...era.com>
To: Borislav Petkov <bp@...en8.de>
Cc: dinguyen@...nel.org, tony.luck@...el.com, james.morse@....com,
mchehab@...nel.org, rric@...nel.org, tthayer@...nsource.altera.com,
linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
Niravkumar L Rabara <niravkumar.l.rabara@...el.com>, stable@...nel.org
Subject: Re: [PATCH] EDAC/altera: Use correct width with writes to INTTEST
register.
On 5/29/25 8:41 AM, Borislav Petkov wrote:
> On Tue, May 27, 2025 at 07:57:07AM -0700, Matthew Gerlach wrote:
> > From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> >
> > On SoCFPGA platform INTTEST register only supports 16-bit write based on
> > the HW design, writing 32-bit to INTTEST register triggers SError to CPU.
> > Use 16-bit write for INITTEST register.
>
> For the future, please run this text through AI so that it can massage the
> formulations into proper English:
Great suggestion! With hindsight it should be an obvious suggestion.
>
> On the SoCFPGA platform, the INTTEST register supports only 16-bit writes.
> A 32-bit write triggers an SError to the CPU so do 16-bit accesses only.
>
> > Fixes: c7b4be8db8bc ("EDAC, altera: Add Arria10 OCRAM ECC support")
> > Cc: stable@...nel.org
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
> > Signed-off-by: Matthew Gerlach <matthew.gerlach@...era.com>
> > ---
> > drivers/edac/altera_edac.c | 6 +++---
> > 1 file changed, 3 insertions(+), 3 deletions(-)
>
> Applied, thanks.
Thanks,
Matthew
>
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