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Message-ID: <8adbc5a0-782d-4a07-93d7-c64ae0e3d805@intel.com>
Date: Sun, 1 Jun 2025 13:19:22 +0300
From: "Lifshits, Vitaly" <vitaly.lifshits@...el.com>
To: Vlad URSU <vlad@...u.me>, Jacek Kowalski <jacek@...ekk.info>, Tony Nguyen
<anthony.l.nguyen@...el.com>, Przemek Kitszel <przemyslaw.kitszel@...el.com>,
Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>, "Paolo
Abeni" <pabeni@...hat.com>
CC: <intel-wired-lan@...ts.osuosl.org>, <netdev@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [Intel-wired-lan] [PATCH] e1000e: disregard NVM checksum on tgp
when valid checksum mask is not set
On 5/15/2025 10:07 PM, Vlad URSU wrote:
> On 15.05.2025 07:39, Lifshits, Vitaly wrote:
>> Since the checksum word is 0xFFFF which is peculiar, can you dump the
>> whole NVM and share with us?
>
> Sure, here's a dump of my NVM
>
> Offset Values
> ------ ------
> 0x0000: d0 8e 79 07 78 c8 01 08 ff ff 44 00 01 00 6c 00
> 0x0010: ff ff ff ff c9 10 54 0a 28 10 f9 15 00 00 00 00
> 0x0020: 00 00 00 00 00 80 05 a7 30 30 00 16 00 00 00 0c
> 0x0030: f3 08 00 0a 43 08 13 01 f9 15 ad ba f9 15 fa 15
> 0x0040: ad ba f9 15 ad ba f9 15 00 00 80 80 00 4e 86 08
You're right — I see that the SW compatibility bit is set and the
checksum appears to be incorrect.
Since the NVM is part of the system firmware and typically managed by
the system manufacturer, I recommend checking whether a firmware update
is available for your system as a first step.
If no update is available, perhaps we can consider ignoring the checksum
on TGP systems if one of the following conditions is met:
1. SW compatibility bit is not set (current Jacek's approach)
2. The checksum word at offset 0x3F retains its factory default value of
0xFFFF.
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