| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <ss3xhat6v3s4ivcypw6fqcmblqait56pqhzwuhzyfhevp4kzlr@5e3f5nwb6lhb>
Date: Mon, 2 Jun 2025 10:41:39 -0500
From: Bjorn Andersson <andersson@...nel.org>
To: Wasim Nazir <quic_wasimn@...cinc.com>
Cc: Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
kernel@...cinc.com, kernel@....qualcomm.com,
Pratyush Brahma <quic_pbrahma@...cinc.com>, Prakash Gupta <quic_guptap@...cinc.com>
Subject: Re: [PATCH v9 2/4] arm64: dts: qcom: iq9: Introduce new memory map
for qcs9100/qcs9075
On Fri, May 30, 2025 at 02:58:45PM +0530, Wasim Nazir wrote:
> From: Pratyush Brahma <quic_pbrahma@...cinc.com>
>
> SA8775P has a memory map which caters to the auto specific requirements.
I thought SA8775P was the IoT platform and SA8255P was the automotive
one. Has this changed?
> QCS9100 & QCS9075 are its IOT variants (with marketing name as IQ9) which
> inherit the memory map of SA8775P require a slightly different memory
> map as compared to SA8775P auto parts.
> This new memory map is applicable for all the IoT boards which inherit
> the initial SA8775P memory map. This is not applicable for non-IoT
Is there are platform out there that actually uses the "initial SA8775P
memory map"?
> boards.
>
> Some new carveouts (viz. gunyah_md and a few pil dtb carveouts) have been
> introduced as part of firmware updates for IoT. The size and base address
> have been updated for video PIL carveout compared to SA8775P since it is
> being brought up for the first time on IoT boards. The base addresses
> of the rest of the PIL carveouts have been updated to accommodate the
> change in size of video since PIL regions are relocatable and their
> functionality is not impacted due to this change. The size of camera
> pil has also been increased without breaking any feature.
>
> The size of trusted apps carveout has also been reduced since it is
> sufficient to meet IoT requirements. Also, audio_mdf_mem & tz_ffi_mem
> carveout and its corresponding scm reference has been removed as these
> are not required for IoT parts.
>
> Incorporate these changes in the updated memory map.
>
> Signed-off-by: Pratyush Brahma <quic_pbrahma@...cinc.com>
> Signed-off-by: Prakash Gupta <quic_guptap@...cinc.com>
> Signed-off-by: Wasim Nazir <quic_wasimn@...cinc.com>
> ---
> .../boot/dts/qcom/iq9-reserved-memory.dtsi | 113 ++++++++++++++++++
> 1 file changed, 113 insertions(+)
> create mode 100644 arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi
>
> diff --git a/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi b/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi
> new file mode 100644
> index 000000000000..ff2600eb5e3d
> --- /dev/null
> +++ b/arch/arm64/boot/dts/qcom/iq9-reserved-memory.dtsi
The naming convention is <soc>-<something>.dtsi and I don't see any
other uses of the "iq9" naming.
> @@ -0,0 +1,113 @@
> +// SPDX-License-Identifier: BSD-3-Clause
> +
Why is there a blank space here?
Regards,
Bjorn
> +/*
> + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
> + */
> +
> +/delete-node/ &pil_camera_mem;
> +/delete-node/ &pil_adsp_mem;
> +/delete-node/ &pil_gdsp0_mem;
> +/delete-node/ &pil_gdsp1_mem;
> +/delete-node/ &pil_cdsp0_mem;
> +/delete-node/ &pil_gpu_mem;
> +/delete-node/ &pil_cdsp1_mem;
> +/delete-node/ &pil_cvp_mem;
> +/delete-node/ &pil_video_mem;
> +/delete-node/ &audio_mdf_mem;
> +/delete-node/ &trusted_apps_mem;
> +/delete-node/ &hyptz_reserved_mem;
> +/delete-node/ &tz_ffi_mem;
> +
> +/ {
> + reserved-memory {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + ranges;
> +
> + gunyah_md_mem: gunyah-md@...80000 {
> + reg = <0x0 0x91a80000 0x0 0x80000>;
> + no-map;
> + };
> +
> + pil_camera_mem: pil-camera@...00000 {
> + reg = <0x0 0x95200000 0x0 0x700000>;
> + no-map;
> + };
> +
> + pil_adsp_mem: pil-adsp@...00000 {
> + reg = <0x0 0x95900000 0x0 0x1e00000>;
> + no-map;
> + };
> +
> + q6_adsp_dtb_mem: q6-adsp-dtb@...00000 {
> + reg = <0x0 0x97700000 0x0 0x80000>;
> + no-map;
> + };
> +
> + q6_gdsp0_dtb_mem: q6-gdsp0-dtb@...80000 {
> + reg = <0x0 0x97780000 0x0 0x80000>;
> + no-map;
> + };
> +
> + pil_gdsp0_mem: pil-gdsp0@...00000 {
> + reg = <0x0 0x97800000 0x0 0x1e00000>;
> + no-map;
> + };
> +
> + pil_gdsp1_mem: pil-gdsp1@...00000 {
> + reg = <0x0 0x99600000 0x0 0x1e00000>;
> + no-map;
> + };
> +
> + q6_gdsp1_dtb_mem: q6-gdsp1-dtb@...00000 {
> + reg = <0x0 0x9b400000 0x0 0x80000>;
> + no-map;
> + };
> +
> + q6_cdsp0_dtb_mem: q6-cdsp0-dtb@...80000 {
> + reg = <0x0 0x9b480000 0x0 0x80000>;
> + no-map;
> + };
> +
> + pil_cdsp0_mem: pil-cdsp0@...00000 {
> + reg = <0x0 0x9b500000 0x0 0x1e00000>;
> + no-map;
> + };
> +
> + pil_gpu_mem: pil-gpu@...00000 {
> + reg = <0x0 0x9d300000 0x0 0x2000>;
> + no-map;
> + };
> +
> + q6_cdsp1_dtb_mem: q6-cdsp1-dtb@...80000 {
> + reg = <0x0 0x9d380000 0x0 0x80000>;
> + no-map;
> + };
> +
> + pil_cdsp1_mem: pil-cdsp1@...00000 {
> + reg = <0x0 0x9d400000 0x0 0x1e00000>;
> + no-map;
> + };
> +
> + pil_cvp_mem: pil-cvp@...00000 {
> + reg = <0x0 0x9f200000 0x0 0x700000>;
> + no-map;
> + };
> +
> + pil_video_mem: pil-video@...00000 {
> + reg = <0x0 0x9f900000 0x0 0x1000000>;
> + no-map;
> + };
> +
> + trusted_apps_mem: trusted-apps@...00000 {
> + reg = <0x0 0xd1900000 0x0 0x1c00000>;
> + no-map;
> + };
> + };
> +
> + firmware {
> + scm {
> + /delete-property/ memory-region;
> + };
> + };
> +};
> --
> 2.49.0
>
Powered by blists - more mailing lists