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Message-ID: <20250602133402.3385163-1-riel@surriel.com>
Date: Mon,  2 Jun 2025 09:30:54 -0400
From: Rik van Riel <riel@...riel.com>
To: linux-kernel@...r.kernel.org
Cc: kernel-team@...a.com,
	dave.hansen@...ux.intel.com,
	luto@...nel.org,
	peterz@...radead.org,
	bp@...en8.de,
	x86@...nel.org,
	yu-cheng.yu@...el.com
Subject: [PATCH 0/3] TLB flush fixes
Some TLB flush fixes extracted from, or encountered while developing
the Intel RAR functionality.
1) Fix a potential overflow in user_pcid_flush_mask.
   I do not think anybody is hitting this in practice,
   but they could if they wanted to.
2) Change the early boot initialized value of invlpgb_count_max
   to 1, to avoid an infinite loop when...
3) Having cpa_flush() call flush_kernel_range(), which results
   in the INVPLGB code being called very early at boot time.
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