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Message-ID: <aD83bbyEPKSDXv_T@google.com>
Date: Tue, 3 Jun 2025 10:57:01 -0700
From: William McVicker <willmcvicker@...gle.com>
To: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: tglx@...utronix.de, Jim Cromie <jim.cromie@...il.com>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
Marco Elver <elver@...gle.com>, Nam Cao <namcao@...utronix.de>,
linux-kernel@...r.kernel.org,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-tegra@...r.kernel.org, John Stulz <jstultz@...gle.com>,
Peter Griffin <peter.griffin@...aro.org>,
Saravan Kanna <saravanak@...gle.com>
Subject: Re: [PATCH v1 4/7] clocksource/drivers/tegra186: Add module owner
On 06/02/2025, Daniel Lezcano wrote:
> The conversion to modules requires a correct handling of the module
> refcount in order to prevent to unload it if it is in use. That is
> especially true with the clockevents where there is no function to
> unregister them.
>
> The core time framework correctly handles the module refcount with the
> different clocksource and clockevents if the module owner is set.
>
> Add the module owner to make sure the core framework will prevent
> stupid things happening when the driver will be converted into a
> module.
>
> Signed-off-by: Daniel Lezcano <daniel.lezcano@...aro.org>
Reviewed-by: Will McVicker <willmcvicker@...gle.com>
Thanks,
Will
> ---
> drivers/clocksource/timer-tegra186.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/clocksource/timer-tegra186.c b/drivers/clocksource/timer-tegra186.c
> index e5394f98a02e..56a5342bcf78 100644
> --- a/drivers/clocksource/timer-tegra186.c
> +++ b/drivers/clocksource/timer-tegra186.c
> @@ -373,6 +373,7 @@ static int tegra186_timer_tsc_init(struct tegra186_timer *tegra)
> tegra->tsc.read = tegra186_timer_tsc_read;
> tegra->tsc.mask = CLOCKSOURCE_MASK(56);
> tegra->tsc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
> + tegra->tsc.owner = THIS_MODULE;
>
> return clocksource_register_hz(&tegra->tsc, 31250000);
> }
> @@ -392,6 +393,7 @@ static int tegra186_timer_osc_init(struct tegra186_timer *tegra)
> tegra->osc.read = tegra186_timer_osc_read;
> tegra->osc.mask = CLOCKSOURCE_MASK(32);
> tegra->osc.flags = CLOCK_SOURCE_IS_CONTINUOUS;
> + tegra->osc.owner = THIS_MODULE;
>
> return clocksource_register_hz(&tegra->osc, 38400000);
> }
> @@ -411,6 +413,7 @@ static int tegra186_timer_usec_init(struct tegra186_timer *tegra)
> tegra->usec.read = tegra186_timer_usec_read;
> tegra->usec.mask = CLOCKSOURCE_MASK(32);
> tegra->usec.flags = CLOCK_SOURCE_IS_CONTINUOUS;
> + tegra->usec.owner = THIS_MODULE;
>
> return clocksource_register_hz(&tegra->usec, USEC_PER_SEC);
> }
> --
> 2.43.0
>
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