linux-kernel - Re: [PATCH 24/25] PCI: Perform reset_resource() and build fail list in sync

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Message-ID: <bd579412-d07c-476d-8932-55c1f69adc9f@linaro.org>
Date: Tue, 3 Jun 2025 16:25:30 +0100
From: Tudor Ambarus <tudor.ambarus@...aro.org>
To: Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>, linux-pci@...r.kernel.org,
 Michał Winiarski <michal.winiarski@...el.com>,
 Igor Mammedov <imammedo@...hat.com>, LKML <linux-kernel@...r.kernel.org>,
 Mika Westerberg <mika.westerberg@...ux.intel.com>,
 William McVicker <willmcvicker@...gle.com>
Subject: Re: [PATCH 24/25] PCI: Perform reset_resource() and build fail list
 in sync



On 6/3/25 3:13 PM, Ilpo Järvinen wrote:
> On Tue, 3 Jun 2025, Tudor Ambarus wrote:
>> On 6/3/25 9:13 AM, Ilpo Järvinen wrote:
>>> So please test if this patch solves your problem:
>>
>> It fails in a different way, the bridge window resource never gets
>> assigned with the proposed patch.
> 
> Is that a failure? I was expecting that to occur. It didn't assign 
> any resources into that bridge window.

It leads to a watchdog interrupt on my pixel6. Last print I see on my
console is related to the modem booting status. My wild guess is that
that modem accesses something from the unassigned bridge window.

In the working case I see the bridge window printed:
[   15.457310][ T1083] pcieport 0000:00:00.0: [s51xx_pcie_probe] BAR 14:
tmp rsc : [mem 0x40000000-0x401fffff]

[   15.457683][ T1083] cpif: s51xx_pcie_probe: Set Doorbell register
address.

In the failing case I see:
[   15.623270][ T1113] pcieport 0000:00:00.0: [s51xx_pcie_probe] BAR 14:
tmp rsc : [??? 0x00000000 flags 0x0]

[   15.623638][ T1113] cpif: s51xx_pcie_probe: Set Doorbell register
address.
> 
> If there's nothing to be assigned into the bridge window, the bridge 
> window itself is not created, that is the expected behavior (working as 
> designed). So you're comparing to the bridge window that was made too 
> large due to the disparity (and left unused, AFAICT).
> 
> It would be possible to put the condition inside the block which adds 
> the resource to the realloc_head, I initially put it there but then 
> decided to remove the disparity completely because why keep it if no 
> resource is going to be placed into the bridge window.
> 
Thanks for the educative answers.

> What's that class 0 device anyway? Why it has class 0?
>
I don't know yet, it's the first time I'm dealing with a PCI driver. Any
idea where is the class typically assigned?

>> With the patch applied: https://termbin.com/h3w0
>> With the blamed commit reverted: https://termbin.com/3rh6
>