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Message-Id: <20250604-imx95-rproc-1-v1-2-a6e5f512731c@nxp.com>
Date: Wed, 04 Jun 2025 10:33:44 +0800
From: "Peng Fan (OSS)" <peng.fan@....nxp.com>
To: Bjorn Andersson <andersson@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Iuliana Prodan <iuliana.prodan@....com>,
Daniel Baluta <daniel.baluta@....com>
Cc: linux-remoteproc@...r.kernel.org, devicetree@...r.kernel.org,
imx@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Peng Fan <peng.fan@....com>
Subject: [PATCH 2/3] remoteproc: imx_rproc: Add support for System Manager
API
From: Peng Fan <peng.fan@....com>
i.MX95 features a Cortex-M33 core, six Cortex-A55 cores, and
one Cortex-M7 core. The System Control Management Interface(SCMI)
firmware runs on the M33 core. The i.MX95 SCMI firmware named System
Manager(SM) includes vendor extension protocols, Logical Machine
Management(LMM) protocol and CPU protocol and etc.
There are three cases for M7:
(1) M7 in a separate Logical Machine(LM) that Linux couldn't control it.
(2) M7 in a separate Logical Machine that Linux could control it using
LMM protocol
(3) M7 runs in same Logical Machine as A55, so Linux could control it
using CPU protocol
So extend the driver to using LMM and CPU protocol to manage the M7 core.
- Add IMX_RPROC_SM to indicate the remotecores runs on a SoC that
has System Manager.
- Compare linux LM ID(got using scmi_imx_lmm_info) and M7 LM ID(got
from DTB), if same, use CPU protocol to start/stop. Otherwise, use
LMM protocol to start/stop.
Whether using CPU or LMM protocol to start/stop, the M7 status
detection could use CPU protocol to detect started or not. So
in imx_rproc_detect_mode, use scmi_imx_cpu_started to check the
status of M7.
- For above case 1 and 2, Use SCMI_IMX_LMM_POWER_ON to detect whether
the M7 LM is under control of A55 LM.
Current setup relies on pre-Linux software(U-Boot) to do
M7 TCM ECC initialization. In future, we could add the support in Linux
to decouple U-Boot and Linux.
Signed-off-by: Peng Fan <peng.fan@....com>
---
drivers/remoteproc/imx_rproc.c | 139 ++++++++++++++++++++++++++++++++++++++++-
drivers/remoteproc/imx_rproc.h | 2 +
2 files changed, 139 insertions(+), 2 deletions(-)
diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c
index 74299af1d7f10a0db794de494c52304b2323b89f..0649faa98725db99366946c65edf5b7daff78316 100644
--- a/drivers/remoteproc/imx_rproc.c
+++ b/drivers/remoteproc/imx_rproc.c
@@ -8,6 +8,7 @@
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/firmware/imx/sci.h>
+#include <linux/firmware/imx/sm.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/mailbox_client.h>
@@ -21,6 +22,7 @@
#include <linux/reboot.h>
#include <linux/regmap.h>
#include <linux/remoteproc.h>
+#include <linux/scmi_imx_protocol.h>
#include <linux/workqueue.h>
#include "imx_rproc.h"
@@ -91,6 +93,11 @@ struct imx_rproc_mem {
#define ATT_CORE_MASK 0xffff
#define ATT_CORE(I) BIT((I))
+/* Logical Machine Operation */
+#define IMX_RPROC_FLAGS_SM_LMM_OP BIT(0)
+/* Linux has permission to handle the Logical Machine of remote cores */
+#define IMX_RPROC_FLAGS_SM_LMM_AVAIL BIT(1)
+
static int imx_rproc_xtr_mbox_init(struct rproc *rproc, bool tx_block);
static void imx_rproc_free_mbox(struct rproc *rproc);
@@ -115,6 +122,22 @@ struct imx_rproc {
u32 entry; /* cpu start address */
u32 core_index;
struct dev_pm_domain_list *pd_list;
+ /* For i.MX System Manager based systems */
+ u32 cpuid;
+ u32 lmid;
+ u32 flags;
+};
+
+static const struct imx_rproc_att imx_rproc_att_imx95_m7[] = {
+ /* dev addr , sys addr , size , flags */
+ /* TCM CODE NON-SECURE */
+ { 0x00000000, 0x203C0000, 0x00040000, ATT_OWN | ATT_IOMEM },
+
+ /* TCM SYS NON-SECURE*/
+ { 0x20000000, 0x20400000, 0x00040000, ATT_OWN | ATT_IOMEM },
+
+ /* DDR */
+ { 0x80000000, 0x80000000, 0x50000000, 0 },
};
static const struct imx_rproc_att imx_rproc_att_imx93[] = {
@@ -393,6 +416,30 @@ static int imx_rproc_start(struct rproc *rproc)
case IMX_RPROC_SCU_API:
ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, true, priv->entry);
break;
+ case IMX_RPROC_SM:
+ if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP) {
+ if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_AVAIL))
+ return -EACCES;
+
+ ret = scmi_imx_lmm_reset_vector_set(priv->lmid, priv->cpuid, 0, 0);
+ if (ret) {
+ dev_err(dev, "Failed to set reset vector lmid(%u), cpuid(%u): %d\n",
+ priv->lmid, priv->cpuid, ret);
+ }
+
+ ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_BOOT, 0);
+ if (ret)
+ dev_err(dev, "Failed to boot lmm(%d): %d\n", ret, priv->lmid);
+ } else {
+ ret = scmi_imx_cpu_reset_vector_set(priv->cpuid, 0, true, false, false);
+ if (ret) {
+ dev_err(dev, "Failed to set reset vector cpuid(%u): %d\n",
+ priv->cpuid, ret);
+ }
+
+ ret = scmi_imx_cpu_start(priv->cpuid, true);
+ }
+ break;
default:
return -EOPNOTSUPP;
}
@@ -435,6 +482,16 @@ static int imx_rproc_stop(struct rproc *rproc)
case IMX_RPROC_SCU_API:
ret = imx_sc_pm_cpu_start(priv->ipc_handle, priv->rsrc_id, false, priv->entry);
break;
+ case IMX_RPROC_SM:
+ if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP) {
+ if (priv->flags & IMX_RPROC_FLAGS_SM_LMM_AVAIL)
+ ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_SHUTDOWN, 0);
+ else
+ ret = -EACCES;
+ } else {
+ ret = scmi_imx_cpu_start(priv->cpuid, false);
+ }
+ break;
default:
return -EOPNOTSUPP;
}
@@ -549,9 +606,11 @@ static int imx_rproc_prepare(struct rproc *rproc)
{
struct imx_rproc *priv = rproc->priv;
struct device_node *np = priv->dev->of_node;
+ const struct imx_rproc_dcfg *dcfg = priv->dcfg;
struct of_phandle_iterator it;
struct rproc_mem_entry *mem;
struct reserved_mem *rmem;
+ int ret;
u32 da;
/* Register associated reserved memory regions */
@@ -592,6 +651,38 @@ static int imx_rproc_prepare(struct rproc *rproc)
rproc_add_carveout(rproc, mem);
}
+ switch (dcfg->method) {
+ case IMX_RPROC_SM:
+ if (!(priv->flags & IMX_RPROC_FLAGS_SM_LMM_OP))
+ break;
+ /*
+ * Power on the Logical Machine to make sure TCM is available.
+ * Also serve as permission check. If in different Logical
+ * Machine, and linux has permission to handle the Logical
+ * Machine, set IMX_RPROC_FLAGS_SM_LMM_AVAIL.
+ */
+ ret = scmi_imx_lmm_operation(priv->lmid, SCMI_IMX_LMM_POWER_ON, 0);
+ if (ret == 0) {
+ dev_info(priv->dev, "lmm(%d) powered on\n", priv->lmid);
+ priv->flags |= IMX_RPROC_FLAGS_SM_LMM_AVAIL;
+ } else if (ret == -EACCES) {
+ dev_info(priv->dev, "lmm(%d) not under Linux Control\n", priv->lmid);
+ /*
+ * If remote cores boots up, continue the rpmsg channel setup,
+ * else linux have no permission, so return -EACCES.
+ */
+ if (priv->rproc->state != RPROC_DETACHED)
+ return -EACCES;
+ } else if (ret) {
+ dev_err(priv->dev, "Failed to power on lmm(%d): %d\n", ret, priv->lmid);
+ return ret;
+ }
+
+ break;
+ default:
+ break;
+ };
+
return 0;
}
@@ -911,13 +1002,53 @@ static int imx_rproc_detect_mode(struct imx_rproc *priv)
struct regmap_config config = { .name = "imx-rproc" };
const struct imx_rproc_dcfg *dcfg = priv->dcfg;
struct device *dev = priv->dev;
+ struct scmi_imx_lmm_info info;
struct regmap *regmap;
struct arm_smccc_res res;
+ bool started = false;
int ret;
u32 val;
u8 pt;
switch (dcfg->method) {
+ case IMX_RPROC_SM:
+ /* Get current Linux Logical Machine ID */
+ ret = scmi_imx_lmm_info(LMM_ID_DISCOVER, &info);
+ if (ret) {
+ dev_err(dev, "Failed to get current LMM ID err: %d\n", ret);
+ return ret;
+ }
+
+ ret = of_property_read_u32(dev->of_node, "fsl,cpu-id", &priv->cpuid);
+ if (ret) {
+ dev_err(dev, "No fsl,cpu-id property\n");
+ return ret;
+ }
+
+ ret = of_property_read_u32(dev->of_node, "fsl,lmm-id", &priv->lmid);
+ if (ret) {
+ dev_info(dev, "No fsl,lmm-id property\n");
+ return ret;
+ }
+
+ /*
+ * Check whether remote processor is in same Logical Machine as Linux.
+ * If no, need use Logical Machine API to manage remote processor, and
+ * set IMX_RPROC_FLAGS_SM_LMM_OP.
+ * If yes, use CPU protocol API to manage remote processor.
+ */
+ if (priv->lmid != info.lmid) {
+ priv->flags |= IMX_RPROC_FLAGS_SM_LMM_OP;
+ dev_info(dev, "Using LMM Protocol OPS\n");
+ } else {
+ dev_info(dev, "Using CPU Protocol OPS\n");
+ }
+
+ scmi_imx_cpu_started(priv->cpuid, &started);
+ if (started)
+ priv->rproc->state = RPROC_DETACHED;
+
+ return 0;
case IMX_RPROC_NONE:
priv->rproc->state = RPROC_DETACHED;
return 0;
@@ -1029,8 +1160,12 @@ static int imx_rproc_clk_enable(struct imx_rproc *priv)
struct device *dev = priv->dev;
int ret;
- /* Remote core is not under control of Linux */
- if (dcfg->method == IMX_RPROC_NONE)
+ /*
+ * IMX_RPROC_NONE indicates not under control of Linux.
+ * System Manager(SM) firmware automatically configures clock,
+ * so bypass the clk settings for IMX_RPROC_SM.
+ */
+ if (dcfg->method == IMX_RPROC_NONE || dcfg->method == IMX_RPROC_SM)
return 0;
priv->clk = devm_clk_get(dev, NULL);
diff --git a/drivers/remoteproc/imx_rproc.h b/drivers/remoteproc/imx_rproc.h
index cfd38d37e1467d1d9e6f89be146c0b53262b92a0..e3e851d88fb069a589531ea21a3790fd62fde57d 100644
--- a/drivers/remoteproc/imx_rproc.h
+++ b/drivers/remoteproc/imx_rproc.h
@@ -26,6 +26,8 @@ enum imx_rproc_method {
IMX_RPROC_SCU_API,
/* Through Reset Controller API */
IMX_RPROC_RESET_CONTROLLER,
+ /* Through System Manager */
+ IMX_RPROC_SM,
};
/* dcfg flags */
--
2.37.1
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