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Message-ID: <CAMuHMdUFHKHKfymqa6jwfNnxZTAuH3kbj5WL+-zN=TR6XGd0eA@mail.gmail.com>
Date: Wed, 4 Jun 2025 10:40:25 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Marek Vasut <marek.vasut+renesas@...lbox.org>
Cc: linux-arm-kernel@...ts.infradead.org, Anand Moon <linux.amoon@...il.com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>, Bartosz Golaszewski <brgl@...ev.pl>,
Bjorn Helgaas <bhelgaas@...gle.com>, Conor Dooley <conor+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh@...nel.org>, Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org, linux-renesas-soc@...r.kernel.org
Subject: Re: [PATCH v2 1/3] PCI/pwrctrl: Add optional slot clock to pwrctrl
driver for PCI slots
Hi Marek,
Thanks for your patch!
On Sat, 31 May 2025 at 00:55, Marek Vasut
<marek.vasut+renesas@...lbox.org> wrote:
> Add the ability to enable optional slot clock into the pwrctrl driver.
> This is used to enable slot clock in split-clock topologies, where the
> PCIe host/controller supply and PCIe slot supply are not provided by
> the same clock. The PCIe host/controller clock should be described in
> the controller node as the controller clock, while the slot clock should
> be described in controller bridge/slot subnode.
>
> Example DT snippet:
> &pcicontroller {
> clocks = <&clk_dif 0>; /* PCIe controller clock */
>
> pci@0,0 {
> #address-cells = <3>;
> #size-cells = <2>;
> reg = <0x0 0x0 0x0 0x0 0x0>;
> compatible = "pciclass,0604";
> device_type = "pci";
> clocks = <&clk_dif 1>; /* PCIe slot clock */
I assume this should be documented in
dtschema/schemas/pci/pci-bus-common.yaml, too?
> vpcie3v3-supply = <®_3p3v>;
> ranges;
> };
> };
>
> Example clock topology:
> ____________ ____________
> | PCIe host | | PCIe slot |
> | | | |
> | PCIe RX<|==================|>PCIe TX |
> | PCIe TX<|==================|>PCIe RX |
> | | | |
> | PCIe CLK<|======.. ..======|>PCIe CLK |
> '------------' || || '------------'
> || ||
> ____________ || ||
> | 9FGV0441 | || ||
> | | || ||
> | CLK DIF0<|======'' ||
> | CLK DIF1<|==========''
> | CLK DIF2<|
> | CLK DIF3<|
> '------------'
>
> Reviewed-by: Anand Moon <linux.amoon@...il.com>
> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@...lbox.org>
> --- a/drivers/pci/pwrctrl/slot.c
> +++ b/drivers/pci/pwrctrl/slot.c
> @@ -30,6 +31,7 @@ static int pci_pwrctrl_slot_probe(struct platform_device *pdev)
> {
> struct pci_pwrctrl_slot_data *slot;
> struct device *dev = &pdev->dev;
> + struct clk *clk;
> int ret;
>
> slot = devm_kzalloc(dev, sizeof(*slot), GFP_KERNEL);
> @@ -50,6 +52,13 @@ static int pci_pwrctrl_slot_probe(struct platform_device *pdev)
> goto err_regulator_free;
> }
>
> + clk = devm_clk_get_optional_enabled(dev, NULL);
> + if (IS_ERR(clk)) {
> + ret = dev_err_probe(dev, PTR_ERR(clk),
> + "Failed to enable slot clock\n");
> + goto err_regulator_disable;
> + }
You are adding this block in the middle of the regulator handling.
Please move it below, under the devm_add_action_or_reset() call
(which is handled wrong, I have sent a patch[1]).
> +
> ret = devm_add_action_or_reset(dev, devm_pci_pwrctrl_slot_power_off,
> slot);
> if (ret)
[1] https://lore.kernel.org/f60c445e965ba309f08c33de78bd62f358e68cd0.1749025687.git.geert+renesas@glider.be
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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