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Message-ID: <9089f618-0df1-4710-8158-36f58c94a0c6@kernel.org>
Date: Wed, 4 Jun 2025 13:36:05 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Qiang Yu <quic_qianyu@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Ziyue Zhang <quic_ziyuzhan@...cinc.com>
Cc: lpieralisi@...nel.org, kwilczynski@...nel.org,
manivannan.sadhasivam@...aro.org, robh@...nel.org, bhelgaas@...gle.com,
krzk+dt@...nel.org, neil.armstrong@...aro.org, abel.vesa@...aro.org,
kw@...ux.com, conor+dt@...nel.org, vkoul@...nel.org, kishon@...nel.org,
andersson@...nel.org, konradybcio@...nel.org, linux-arm-msm@...r.kernel.org,
linux-pci@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
quic_krichai@...cinc.com, quic_vbadigan@...cinc.com
Subject: Re: [PATCH v1 2/4] dt-bindings: PCI: qcom,pcie-sa8775p: document
link_down reset
On 04/06/2025 12:05, Qiang Yu wrote:
>>>>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@...cinc.com>
>>>>> ---
>>>>> .../devicetree/bindings/pci/qcom,pcie-sa8775p.yaml | 13 +++++++++----
>>>>> 1 file changed, 9 insertions(+), 4 deletions(-)
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>>>> index e3fa232da2ca..805258cbcf2f 100644
>>>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>>>> @@ -61,11 +61,14 @@ properties:
>>>>> - const: global
>>>>> resets:
>>>>> - maxItems: 1
>>>>> + minItems: 1
>>>>> + maxItems: 2
>>>> Shouldn't we just update this to maxItems:2 / minItems:2 and drop
>>>> minItems:1 from the next clause?
>>> Hi Dmitry,
>>>
>>> link_down reset is optional. In many other platforms, like sm8550
>>> and x1e80100, link_down reset is documented as a optional reset.
>>> PCIe will works fine without link_down reset. So I think setting it
>>> as optional is better.
>> You are describing a hardware. How can a reset be optional in the
>> _hardware_? It's either routed or not.
>
> I feel a bit confused. According to the theory above, everything seems to
> be non-optional when describing hardware, such as registers, clocks,
> resets, regulators, and interrupts—all of them either exist or do not.
Can you construct a DTS being fully complete and correct picture of
hardware without these? If not, they are not optional, because correct
hardware representation would need them.
>
> Seems like I misunderstand the concept of 'optional'? Is 'optional' only
> used for compatibility across different platforms?
>
> Additionally, we have documented the PCIe global interrupt as optional. I
> was taught that, in the PCIe driver, this interrupt is retrieved using the
> platform_get_irq_byname_optional API, so it can be documented as optional.
> However, this still seems to contradict the theory mentioned earlier.
ABI is just one side of the required properties.
Best regards,
Krzysztof
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