linux-kernel - Re: [PATCH v2] riscv: uaccess: Only restore the CSR

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Message-Id: 
 <174908703299.2529829.8532733312132179877.git-patchwork-notify@kernel.org>
Date: Thu, 05 Jun 2025 01:30:32 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Alexandre Ghiti <alexghiti@...osinc.com>
Cc: linux-riscv@...ts.infradead.org, paul.walmsley@...ive.com,
 palmer@...belt.com, aou@...s.berkeley.edu, alex@...ti.fr,
 cyrilbur@...storrent.com, andybnac@...il.com, debug@...osinc.com,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit

Hello:

This patch was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@...belt.com>:

On Mon,  2 Jun 2025 12:15:43 +0000 you wrote:
> From: Cyril Bur <cyrilbur@...storrent.com>
> 
> During switch to csrs will OR the value of the register into the
> corresponding csr. In this case we're only interested in restoring the
> SUM bit not the entire register.
> 
> Fixes: 788aa64c0c01 ("riscv: save the SR_SUM status over switches")
> Signed-off-by: Cyril Bur <cyrilbur@...storrent.com>
> Link: https://lore.kernel.org/r/20250522160954.429333-1-cyrilbur@tenstorrent.com
> Co-developed-by: Alexandre Ghiti <alexghiti@...osinc.com>
> Signed-off-by: Alexandre Ghiti <alexghiti@...osinc.com>
> 
> [...]

Here is the summary with links:
  - [v2] riscv: uaccess: Only restore the CSR_STATUS SUM bit
    https://git.kernel.org/riscv/c/4e27ce58e7fa

You are awesome, thank you!
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