lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <4a66adfa-fc10-4668-9986-55f6cf231988@zytor.com>
Date: Fri, 6 Jun 2025 17:58:02 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Paolo Bonzini <pbonzini@...hat.com>,
        Lai Jiangshan <jiangshanlai@...il.com>, linux-kernel@...r.kernel.org,
        kvm@...r.kernel.org
Cc: Lai Jiangshan <laijs@...ux.alibaba.com>,
        Sean Christopherson <seanjc@...gle.com>,
        Vitaly Kuznetsov <vkuznets@...hat.com>,
        Wanpeng Li <wanpengli@...cent.com>, Jim Mattson <jmattson@...gle.com>,
        Joerg Roedel <joro@...tes.org>, Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org
Subject: Re: [PATCH] KVM: X86: Raise #GP when clearing CR0_PG in 64 bit mode

On 2021-12-09 09:55, Paolo Bonzini wrote:
> On 12/7/21 10:52, Lai Jiangshan wrote:
>> From: Lai Jiangshan <laijs@...ux.alibaba.com>
>>
>> In the SDM:
>> If the logical processor is in 64-bit mode or if CR4.PCIDE = 1, an
>> attempt to clear CR0.PG causes a general-protection exception (#GP).
>> Software should transition to compatibility mode and clear CR4.PCIDE
>> before attempting to disable paging.
>>
>> Signed-off-by: Lai Jiangshan <laijs@...ux.alibaba.com>
>> ---
>>   arch/x86/kvm/x86.c | 3 ++-
>>   1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>> index 00f5b2b82909..78c40ac3b197 100644
>> --- a/arch/x86/kvm/x86.c
>> +++ b/arch/x86/kvm/x86.c
>> @@ -906,7 +906,8 @@ int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned 
>> long cr0)
>>           !load_pdptrs(vcpu, kvm_read_cr3(vcpu)))
>>           return 1;
>> -    if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
>> +    if (!(cr0 & X86_CR0_PG) &&
>> +        (is_64_bit_mode(vcpu) || kvm_read_cr4_bits(vcpu, 
>> X86_CR4_PCIDE)))
>>           return 1;
>>       static_call(kvm_x86_set_cr0)(vcpu, cr0);
>>
> 
> Queued, thanks.
> 

Have you actually checked to see what real CPUs do in this case?

	-hpa


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ