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Message-ID: <20250607132238.4ce19d54@jic23-huawei>
Date: Sat, 7 Jun 2025 13:22:38 +0100
From: Jonathan Cameron <jic23@...nel.org>
To: David Lechner <dlechner@...libre.com>
Cc: Jonathan Santos <Jonathan.Santos@...log.com>, linux-iio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-gpio@...r.kernel.org, andy@...nel.org, nuno.sa@...log.com,
Michael.Hennerich@...log.com, marcelo.schmitt@...log.com, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, marcelo.schmitt1@...il.com,
linus.walleij@...aro.org, brgl@...ev.pl, lgirdwood@...il.com,
broonie@...nel.org, jonath4nns@...il.com
Subject: Re: [PATCH v10 01/12] iio: adc: ad7768-1: Ensure SYNC_IN pulse
minimum timing requirement
On Wed, 4 Jun 2025 15:14:59 -0500
David Lechner <dlechner@...libre.com> wrote:
> On 6/4/25 2:35 PM, Jonathan Santos wrote:
> > The SYNC_IN pulse width must be at least 1.5 x Tmclk, corresponding to
> > ~2.5 µs at the lowest supported MCLK frequency. Add a 3 µs delay to
> > ensure reliable synchronization timing even for the worst-case scenario.
> >
> > Signed-off-by: Jonathan Santos <Jonathan.Santos@...log.com>
> > ---
>
> Reviewed-by: David Lechner <dlechner@...libre.com>
This stands fine on it's own so applied even if I don't yet pick up the
rest of the series.
Applied to the testing branch of iio.git which I'll rebase on rc1 sometime
early next week.
Thanks,
Jonathan
>
> > v10 Changes:
> > * New patch.
> > ---
> > drivers/iio/adc/ad7768-1.c | 23 +++++++++++++++++++----
> > 1 file changed, 19 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c
> > index 51134023534a..8b414a102864 100644
> > --- a/drivers/iio/adc/ad7768-1.c
> > +++ b/drivers/iio/adc/ad7768-1.c
> > @@ -252,6 +252,24 @@ static const struct regmap_config ad7768_regmap24_config = {
> > .max_register = AD7768_REG24_COEFF_DATA,
> > };
> >
> > +static int ad7768_send_sync_pulse(struct ad7768_state *st)
> > +{
> > + /*
> > + * The datasheet specifies a minimum SYNC_IN pulse width of 1.5 × Tmclk,
> > + * where Tmclk is the MCLK period. The supported MCLK frequencies range
> > + * from 0.6 MHz to 17 MHz, which corresponds to a minimum SYNC_IN pulse
> > + * width of approximately 2.5 µs in the worst-case scenario (0.6 MHz).
> > + *
> > + * Add a delay to ensure the pulse width is always sufficient to
> > + * trigger synchronization.
> > + */
> > + gpiod_set_value_cansleep(st->gpio_sync_in, 1);
> > + fsleep(3);
> > + gpiod_set_value_cansleep(st->gpio_sync_in, 0);
> > +
> > + return 0;
>
> There is no other return, so this could be a void function. In this case, it is
> fine because a later patch adds another return. But in the future, be sure to
> mention that in the commit message (or below the ---) so that reviewers will
> know why without having to look ahead.
>
> > +}
> > +
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