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Message-ID: <20250607165004.4673e9f5@jic23-huawei>
Date: Sat, 7 Jun 2025 16:50:04 +0100
From: Jonathan Cameron <jic23@...nel.org>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: Gustavo Silva <gustavograzs@...il.com>, Alex Lanzano
 <lanzano.alex@...il.com>, David Lechner <dlechner@...libre.com>, Nuno
 Sá <nuno.sa@...log.com>, linux-iio@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] iio: imu: bmi270: add channel for step counter

On Fri, 6 Jun 2025 12:14:44 +0300
Andy Shevchenko <andriy.shevchenko@...ux.intel.com> wrote:

> On Thu, Jun 05, 2025 at 07:05:01PM -0300, Gustavo Silva wrote:
> > Add a channel for enabling/disabling the step counter, reading the
> > number of steps and resetting the counter.  
> 
> ...
> 
> > +static int bmi270_update_feature_reg(struct bmi270_data *data,
> > +				     enum bmi270_feature_reg_id id,
> > +				     u16 mask, u16 val)
> > +{
> > +	u16 regval = 0;  
> 
> Redundant assignment.
> 
> > +	int ret;
> > +
> > +	ret = bmi270_read_feature_reg(data, id, &regval);
> > +	if (ret)
> > +		return ret;  
> 
> > +	set_mask_bits(&regval, mask, val);  
> 
> You can't do this on the 16-bit values on some architectures.
> Maybe it's easy to implement cmpxchg() for 16-bit values there,
> though.

It doesn't need to be atomic, so stick to traditional

	regval &= ~mask;
	regval |= bits;

And avoid the fun of architectural corner cases entirely.
> 
> > +	return bmi270_write_feature_reg(data, id, regval);
> > +}  
> 


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