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Message-ID: <f2e49d66-ac97-4502-abe7-c02f560637e6@163.com>
Date: Sat, 7 Jun 2025 23:59:24 +0800
From: Hans Zhang <18255117159@....com>
To: mahesh@...ux.ibm.com, bhelgaas@...gle.com
Cc: oohall@...il.com, linuxppc-dev@...ts.ozlabs.org,
 linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
 Manivannan Sadhasivam <mani@...nel.org>
Subject: Re: [PATCH v2] PCI/AER: Use pci_clear_and_set_config_dword() to
 simplify mask updates

Add Mani's new email address.

On 2025/6/7 23:51, Hans Zhang wrote:
> Replace manual read-modify-write sequences in multiple functions with
> pci_clear_and_set_config_dword() to ensure atomic operations and reduce
> code duplication.
> 
> Signed-off-by: Hans Zhang <18255117159@....com>
> ---
> Changes for v2:
> - The patch commit message were modified.
> - New optimizations for the functions disable_ecrc_checking, aer_enable_irq, and aer_disable_irq have been added.
> ---
>   drivers/pci/pcie/aer.c | 30 +++++++++++-------------------
>   1 file changed, 11 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index 70ac66188367..86cbd204a73f 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -176,14 +176,13 @@ static int enable_ecrc_checking(struct pci_dev *dev)
>   static int disable_ecrc_checking(struct pci_dev *dev)
>   {
>   	int aer = dev->aer_cap;
> -	u32 reg32;
>   
>   	if (!aer)
>   		return -ENODEV;
>   
> -	pci_read_config_dword(dev, aer + PCI_ERR_CAP, &reg32);
> -	reg32 &= ~(PCI_ERR_CAP_ECRC_GENE | PCI_ERR_CAP_ECRC_CHKE);
> -	pci_write_config_dword(dev, aer + PCI_ERR_CAP, reg32);
> +	pci_clear_and_set_config_dword(dev, aer + PCI_ERR_CAP,
> +				       PCI_ERR_CAP_ECRC_GENE |
> +				       PCI_ERR_CAP_ECRC_CHKE, 0);
>   
>   	return 0;
>   }
> @@ -1101,15 +1100,12 @@ static bool find_source_device(struct pci_dev *parent,
>   static void pci_aer_unmask_internal_errors(struct pci_dev *dev)
>   {
>   	int aer = dev->aer_cap;
> -	u32 mask;
>   
> -	pci_read_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, &mask);
> -	mask &= ~PCI_ERR_UNC_INTN;
> -	pci_write_config_dword(dev, aer + PCI_ERR_UNCOR_MASK, mask);
> +	pci_clear_and_set_config_dword(dev, aer + PCI_ERR_UNCOR_MASK,
> +				       PCI_ERR_UNC_INTN, 0);
>   
> -	pci_read_config_dword(dev, aer + PCI_ERR_COR_MASK, &mask);
> -	mask &= ~PCI_ERR_COR_INTERNAL;
> -	pci_write_config_dword(dev, aer + PCI_ERR_COR_MASK, mask);
> +	pci_clear_and_set_config_dword(dev, aer + PCI_ERR_COR_MASK,
> +				       PCI_ERR_COR_INTERNAL, 0);
>   }
>   
>   static bool is_cxl_mem_dev(struct pci_dev *dev)
> @@ -1555,23 +1551,19 @@ static irqreturn_t aer_irq(int irq, void *context)
>   static void aer_enable_irq(struct pci_dev *pdev)
>   {
>   	int aer = pdev->aer_cap;
> -	u32 reg32;
>   
>   	/* Enable Root Port's interrupt in response to error messages */
> -	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, &reg32);
> -	reg32 |= ROOT_PORT_INTR_ON_MESG_MASK;
> -	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32);
> +	pci_clear_and_set_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND,
> +				       0, ROOT_PORT_INTR_ON_MESG_MASK);
>   }
>   
>   static void aer_disable_irq(struct pci_dev *pdev)
>   {
>   	int aer = pdev->aer_cap;
> -	u32 reg32;
>   
>   	/* Disable Root Port's interrupt in response to error messages */
> -	pci_read_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, &reg32);
> -	reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
> -	pci_write_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND, reg32);
> +	pci_clear_and_set_config_dword(pdev, aer + PCI_ERR_ROOT_COMMAND,
> +				       ROOT_PORT_INTR_ON_MESG_MASK, 0);
>   }
>   
>   /**
> 
> base-commit: ec7714e4947909190ffb3041a03311a975350fe0


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