linux-kernel - [PATCH v3 1/3] PCI/pwrctrl: Add optional slot clock to pwrctrl driver for PCI slots

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Message-ID: <20250607194541.79176-1-marek.vasut+renesas@mailbox.org>
Date: Sat,  7 Jun 2025 21:44:37 +0200
From: Marek Vasut <marek.vasut+renesas@...lbox.org>
To: linux-arm-kernel@...ts.infradead.org
Cc: Marek Vasut <marek.vasut+renesas@...lbox.org>,
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>,
	Anand Moon <linux.amoon@...il.com>,
	Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
	Bartosz Golaszewski <brgl@...ev.pl>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Conor Dooley <conor+dt@...nel.org>,
	Geert Uytterhoeven <geert+renesas@...der.be>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Magnus Damm <magnus.damm@...il.com>,
	Rob Herring <robh@...nel.org>,
	Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>,
	devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org,
	linux-renesas-soc@...r.kernel.org
Subject: [PATCH v3 1/3] PCI/pwrctrl: Add optional slot clock to pwrctrl driver for PCI slots

Add the ability to enable optional slot clock into the pwrctrl driver.
This is used to enable slot clock in split-clock topologies, where the
PCIe host/controller supply and PCIe slot supply are not provided by
the same clock. The PCIe host/controller clock should be described in
the controller node as the controller clock, while the slot clock should
be described in controller bridge/slot subnode.

Example DT snippet:
&pcicontroller {
    clocks = <&clk_dif 0>;             /* PCIe controller clock */

    pci@0,0 {
        #address-cells = <3>;
        #size-cells = <2>;
        reg = <0x0 0x0 0x0 0x0 0x0>;
        compatible = "pciclass,0604";
        device_type = "pci";
        clocks = <&clk_dif 1>;         /* PCIe slot clock */
        vpcie3v3-supply = <&reg_3p3v>;
        ranges;
    };
};

Example clock topology:
 ____________                    ____________
|  PCIe host |                  | PCIe slot  |
|            |                  |            |
|    PCIe RX<|==================|>PCIe TX    |
|    PCIe TX<|==================|>PCIe RX    |
|            |                  |            |
|   PCIe CLK<|======..  ..======|>PCIe CLK   |
'------------'      ||  ||      '------------'
                    ||  ||
 ____________       ||  ||
|  9FGV0441  |      ||  ||
|            |      ||  ||
|   CLK DIF0<|======''  ||
|   CLK DIF1<|==========''
|   CLK DIF2<|
|   CLK DIF3<|
'------------'

Acked-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Reviewed-by: Anand Moon <linux.amoon@...il.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@...lbox.org>
---
Cc: Bartosz Golaszewski <brgl@...ev.pl>
Cc: Bjorn Helgaas <bhelgaas@...gle.com>
Cc: Conor Dooley <conor+dt@...nel.org>
Cc: Geert Uytterhoeven <geert+renesas@...der.be>
Cc: Krzysztof Kozlowski <krzk+dt@...nel.org>
Cc: Magnus Damm <magnus.damm@...il.com>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Rob Herring <robh@...nel.org>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@...esas.com>
Cc: devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
Cc: linux-pci@...r.kernel.org
Cc: linux-renesas-soc@...r.kernel.org
---
V2: - Fold PTR_ERR() into dev_err_probe()
    - Add RB from Anand and Manivannan
V3: - Rebase on top of PCI/pwrctrl: Fix double cleanup on devm_add_action_or_reset() failure
    - Move devm_clk_get_optional_enabled() below devm_add_action_or_reset()
    - Add AB from Bartosz
---
 drivers/pci/pwrctrl/slot.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/pci/pwrctrl/slot.c b/drivers/pci/pwrctrl/slot.c
index 26b21746da50b..3320494b62d89 100644
--- a/drivers/pci/pwrctrl/slot.c
+++ b/drivers/pci/pwrctrl/slot.c
@@ -4,6 +4,7 @@
  * Author: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
  */
 
+#include <linux/clk.h>
 #include <linux/device.h>
 #include <linux/mod_devicetable.h>
 #include <linux/module.h>
@@ -30,6 +31,7 @@ static int pci_pwrctrl_slot_probe(struct platform_device *pdev)
 {
 	struct pci_pwrctrl_slot_data *slot;
 	struct device *dev = &pdev->dev;
+	struct clk *clk;
 	int ret;
 
 	slot = devm_kzalloc(dev, sizeof(*slot), GFP_KERNEL);
@@ -56,6 +58,12 @@ static int pci_pwrctrl_slot_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	clk = devm_clk_get_optional_enabled(dev, NULL);
+	if (IS_ERR(clk)) {
+		return dev_err_probe(dev, PTR_ERR(clk),
+				     "Failed to enable slot clock\n");
+	}
+
 	pci_pwrctrl_init(&slot->ctx, dev);
 
 	ret = devm_pci_pwrctrl_device_set_ready(dev, &slot->ctx);
-- 
2.47.2