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Message-ID: <cover.1749494161.git.nicolinc@nvidia.com>
Date: Mon, 9 Jun 2025 11:45:12 -0700
From: Nicolin Chen <nicolinc@...dia.com>
To: <jgg@...dia.com>, <joro@...tes.org>, <will@...nel.org>,
<robin.murphy@....com>, <bhelgaas@...gle.com>
CC: <iommu@...ts.linux.dev>, <linux-kernel@...r.kernel.org>,
<linux-pci@...r.kernel.org>, <patches@...ts.linux.dev>,
<pjaroszynski@...dia.com>, <vsethi@...dia.com>
Subject: [PATCH RFC v1 0/2] iommu&pci: Disable ATS during FLR resets
Hi all,
Per PCIe r6.3, sec 10.3.1 IMPLEMENTATION NOTE, software should disable ATS
before initiating a Function Level Reset, and then ensure no invalidation
requests being issued to a device when its ATS capability is disabled.
Both pci_enable_ats() and pci_disable_ats() are called by an IOMMU driver,
but an unsolicited FLR can happen at any time in the PCI layer. This might
result in a race between them, breaking the rules given by the PCIe Spec.
Therefore, there needs to be a sync between IOMMU and PCI subsystems, to
ensure that ATS will be disabled and never gets re-enabled until the FLR
finishes. Add a pair of new IOMMU helpers for PCI reset functions to call
before and after the reset routines. These two helpers will temporally
attach the device's RID/PASID to IOMMU_DOMAIN_BLOCKED, which should allow
its IOMMU driver to pause any DMA traffic and disable ATS feature until
the FLR is done.
This is on Github:
https://github.com/nicolinc/iommufd/commits/iommu_dev_reset-rfcv1
Thanks
Nicolin
Nicolin Chen (2):
iommu: Introduce iommu_dev_reset_prepare() and iommu_dev_reset_done()
pci: Suspend ATS before doing FLR
include/linux/iommu.h | 12 +++++
drivers/iommu/iommu.c | 106 ++++++++++++++++++++++++++++++++++++++++++
drivers/pci/pci.c | 42 +++++++++++++++--
3 files changed, 156 insertions(+), 4 deletions(-)
--
2.43.0
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