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Message-Id: <20250609-dt-lg-fixes-v1-2-e210e797c2d7@kernel.org>
Date: Mon, 09 Jun 2025 16:54:57 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: soc@...nel.org, Chanho Min <chanho.min@....com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH 2/2] arm64: dts: lg: Add missing PL011 "uartclk"
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
LG131x SoCs are missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.
Signed-off-by: Rob Herring (Arm) <robh@...nel.org>
---
arch/arm64/boot/dts/lg/lg131x.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/lg/lg131x.dtsi b/arch/arm64/boot/dts/lg/lg131x.dtsi
index dc4229bd9ebb..4cb1e4510897 100644
--- a/arch/arm64/boot/dts/lg/lg131x.dtsi
+++ b/arch/arm64/boot/dts/lg/lg131x.dtsi
@@ -128,24 +128,24 @@ uart0: serial@...00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfe000000 0x1000>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
uart1: serial@...00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfe100000 0x1000>;
interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
uart2: serial@...00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0xfe200000 0x1000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk_bus>;
- clock-names = "apb_pclk";
+ clocks = <&clk_bus>, <&clk_bus>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
spi0: spi@...00000 {
--
2.47.2
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