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Message-ID: <20250609-msm-dp-mst-v2-33-a54d8902a23d@quicinc.com>
Date: Mon, 9 Jun 2025 20:21:52 +0800
From: Yongxing Mou <quic_yongmou@...cinc.com>
To: Rob Clark <robin.clark@....qualcomm.com>,
Dmitry Baryshkov
<lumag@...nel.org>,
Abhinav Kumar <abhinav.kumar@...ux.dev>,
Jessica Zhang
<jessica.zhang@....qualcomm.com>,
Sean Paul <sean@...rly.run>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, "Simona
Vetter" <simona@...ll.ch>
CC: <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>,
"Yongxing
Mou" <quic_yongmou@...cinc.com>,
Abhinav Kumar <quic_abhinavk@...cinc.com>
Subject: [PATCH v2 33/38] drm/msm: initialize DRM MST encoders for DP
controllers
From: Abhinav Kumar <quic_abhinavk@...cinc.com>
Initiliaze a DPMST encoder for each MST capable DP controller
and the number of encoders it supports depends on the number
of streams it supports.
Signed-off-by: Abhinav Kumar <quic_abhinavk@...cinc.com>
Signed-off-by: Yongxing Mou <quic_yongmou@...cinc.com>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 23 ++++++++++++++++++++++-
drivers/gpu/drm/msm/dp/dp_display.c | 14 ++++++++++++++
drivers/gpu/drm/msm/msm_drv.h | 13 +++++++++++++
4 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
index ca1ca2e51d7ead0eb34b27f3168e6bb06a71a11a..2eb4c39b111c1d8622e09e78ffafef017e28bbf6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
@@ -28,6 +28,7 @@
* @h_tile_instance: Controller instance used per tile. Number of elements is
* based on num_of_h_tiles
* @is_cmd_mode Boolean to indicate if the CMD mode is requested
+ * @stream_id stream id for which the interface needs to be acquired
* @vsync_source: Source of the TE signal for DSI CMD devices
*/
struct msm_display_info {
@@ -35,6 +36,7 @@ struct msm_display_info {
uint32_t num_of_h_tiles;
uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY];
bool is_cmd_mode;
+ int stream_id;
enum dpu_vsync_source vsync_source;
};
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 1fd82b6747e9058ce11dc2620729921492d5ebdd..45fedf7e74e9c6dfed4bde57eb675e3dd1762fc7 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -652,7 +652,8 @@ static int _dpu_kms_initialize_displayport(struct drm_device *dev,
struct msm_display_info info;
bool yuv_supported;
int rc;
- int i;
+ int i, stream_id;
+ int stream_cnt;
for (i = 0; i < ARRAY_SIZE(priv->dp); i++) {
if (!priv->dp[i])
@@ -675,6 +676,26 @@ static int _dpu_kms_initialize_displayport(struct drm_device *dev,
DPU_ERROR("modeset_init failed for DP, rc = %d\n", rc);
return rc;
}
+
+ stream_cnt = msm_dp_get_mst_max_stream(priv->dp[i]);
+
+ if (stream_cnt > 1) {
+ for (stream_id = 0; stream_id < stream_cnt; stream_id++) {
+ info.stream_id = stream_id;
+ encoder = dpu_encoder_init(dev, DRM_MODE_ENCODER_DPMST, &info);
+ if (IS_ERR(encoder)) {
+ DPU_ERROR("encoder init failed for dp mst display\n");
+ return PTR_ERR(encoder);
+ }
+
+ rc = msm_dp_mst_bridge_init(priv->dp[i], encoder);
+ if (rc) {
+ DPU_ERROR("dp mst bridge %d init failed, %d\n",
+ stream_id, rc);
+ continue;
+ }
+ }
+ }
}
return 0;
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c
index 9dbcf4553cad70c9e3722160a87403fc815765d7..ab1ad0cb6427eb4f86ee8ac6c76788b1a78892a8 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -1417,6 +1417,20 @@ static int msm_dp_display_get_connector_type(struct platform_device *pdev,
return connector_type;
}
+int msm_dp_get_mst_max_stream(struct msm_dp *dp_display)
+{
+ struct msm_dp_display_private *dp_priv;
+
+ dp_priv = container_of(dp_display, struct msm_dp_display_private, msm_dp_display);
+
+ return dp_priv->max_stream;
+}
+
+int msm_dp_mst_bridge_init(struct msm_dp *dp_display, struct drm_encoder *encoder)
+{
+ return msm_dp_mst_drm_bridge_init(dp_display, encoder);
+}
+
static int msm_dp_display_probe(struct platform_device *pdev)
{
int rc = 0;
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index a65077855201746c37ee742364b61116565f3794..dd403107b640ee5ef333d2773b52e38e3869155f 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -372,6 +372,9 @@ bool msm_dp_needs_periph_flush(const struct msm_dp *dp_display,
const struct drm_display_mode *mode);
bool msm_dp_wide_bus_available(const struct msm_dp *dp_display);
+int msm_dp_get_mst_max_stream(struct msm_dp *dp_display);
+int msm_dp_mst_bridge_init(struct msm_dp *dp_display, struct drm_encoder *encoder);
+
#else
static inline int __init msm_dp_register(void)
{
@@ -388,6 +391,16 @@ static inline int msm_dp_modeset_init(struct msm_dp *dp_display,
return -EINVAL;
}
+static inline int msm_dp_get_mst_max_stream(struct msm_dp *dp_display)
+{
+ return -EINVAL;
+}
+
+static inline int msm_dp_mst_bridge_init(struct msm_dp *dp_display, struct drm_encoder *encoder)
+{
+ return -EINVAL;
+}
+
static inline void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp_display)
{
}
--
2.34.1
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