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Message-Id: <de7142ac-f1a3-412f-9f00-502222b20165@app.fastmail.com>
Date: Tue, 10 Jun 2025 17:48:40 +0200
From: "Arnd Bergmann" <arnd@...db.de>
To: "Frank Li" <Frank.li@....com>, "James Clark" <james.clark@...aro.org>
Cc: "Vladimir Oltean" <olteanv@...il.com>, "Mark Brown" <broonie@...nel.org>,
"Vladimir Oltean" <vladimir.oltean@....com>, linux-spi@...r.kernel.org,
imx@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/4] spi: spi-fsl-dspi: Use non-coherent memory for DMA
On Tue, Jun 10, 2025, at 17:15, Frank Li wrote:
> On Mon, Jun 09, 2025 at 04:32:39PM +0100, James Clark wrote:
>> Using coherent memory here isn't functionally necessary.
>> Because the
>> change to use non-coherent memory isn't overly complex and only a few
>> synchronization points are required, we might as well do it while fixing
>> up some other DMA issues.
>
> Any beanfit by use on-coherent memory here?
The driver copies data in and out of a coherent buffer by default. This is
fine if the buffer is only a few bytes in size, but for large transfers
this is quite slow because this bypasses the cache for any DMA master
that is marked as not "dma-coherent" in devicetree.
Patch 3/4 changes the size from a few bytes to many pages of memory,
so it's access the buffer in cache first and manually maintain
coherency.
Arnd
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