linux-kernel - [RFC PATCH v7 18/37] x86/apic: Simplify bitwise operations on apic bitmap

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Message-ID: <20250610175424.209796-19-Neeraj.Upadhyay@amd.com>
Date: Tue, 10 Jun 2025 23:24:05 +0530
From: Neeraj Upadhyay <Neeraj.Upadhyay@....com>
To: <linux-kernel@...r.kernel.org>
CC: <bp@...en8.de>, <tglx@...utronix.de>, <mingo@...hat.com>,
	<dave.hansen@...ux.intel.com>, <Thomas.Lendacky@....com>, <nikunj@....com>,
	<Santosh.Shukla@....com>, <Vasant.Hegde@....com>,
	<Suravee.Suthikulpanit@....com>, <David.Kaplan@....com>, <x86@...nel.org>,
	<hpa@...or.com>, <peterz@...radead.org>, <seanjc@...gle.com>,
	<pbonzini@...hat.com>, <kvm@...r.kernel.org>,
	<kirill.shutemov@...ux.intel.com>, <huibo.wang@....com>,
	<naveen.rao@....com>, <francescolavra.fl@...il.com>, <tiala@...rosoft.com>
Subject: [RFC PATCH v7 18/37] x86/apic: Simplify bitwise operations on apic bitmap

Use 'regs' as a contiguous linear bitmap in  apic_{set|
clear|test}_vector() while doing bitwise operations.
This makes the code simpler by eliminating the need to
determine the offset of the 32-bit register and the vector
bit location within that register prior to performing
bitwise operations.

This change results in slight increase in generated code
size for gcc-14.2.

- Without change

apic_set_vector:
89 f8             mov    %edi,%eax
83 e7 1f          and    $0x1f,%edi
c1 e8 05          shr    $0x5,%eax
c1 e0 04          shl    $0x4,%eax
48 01 c6          add    %rax,%rsi
f0 48 0f ab 3e    lock bts %rdi,(%rsi)
c3                ret

- With change

apic_set_vector:

89 f8             mov    %edi,%eax
c1 e8 05          shr    $0x5,%eax
8d 04 40          lea    (%rax,%rax,2),%eax
c1 e0 05          shl    $0x5,%eax
01 f8             add    %edi,%eax
89 c0             mov    %eax,%eax
f0 48 0f ab 3e    lock bts %rax,(%rsi)
c3                ret

But, lapic.o text size (bytes) decreases with this change:

Obj        Old-size      New-size

lapic.o    28832         28768

Signed-off-by: Neeraj Upadhyay <Neeraj.Upadhyay@....com>
---
Changes since v6:

 - Converted assmebly to AT&T format.
 - Added information about overall kvm.ko text size change.

 arch/x86/include/asm/apic.h | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index b7cbe9ba363e..f91d23757375 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -564,19 +564,28 @@ static __always_inline void apic_set_reg64(void *regs, int reg, u64 val)
 	ap->regs64[reg / 8] = val;
 }
 
+static inline unsigned int get_vec_bit(unsigned int vec)
+{
+	/*
+	 * The registers are 32-bit wide and 16-byte aligned.
+	 * Compensate for the resulting bit number spacing.
+	 */
+	return vec + 96 * (vec / 32);
+}
+
 static inline void apic_clear_vector(int vec, void *bitmap)
 {
-	clear_bit(APIC_VECTOR_TO_BIT_NUMBER(vec), bitmap + APIC_VECTOR_TO_REG_OFFSET(vec));
+	clear_bit(get_vec_bit(vec), bitmap);
 }
 
 static inline void apic_set_vector(int vec, void *bitmap)
 {
-	set_bit(APIC_VECTOR_TO_BIT_NUMBER(vec), bitmap + APIC_VECTOR_TO_REG_OFFSET(vec));
+	set_bit(get_vec_bit(vec), bitmap);
 }
 
 static inline int apic_test_vector(int vec, void *bitmap)
 {
-	return test_bit(APIC_VECTOR_TO_BIT_NUMBER(vec), bitmap + APIC_VECTOR_TO_REG_OFFSET(vec));
+	return test_bit(get_vec_bit(vec), bitmap);
 }
 
 /*
-- 
2.34.1