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Message-ID: <20250610234141.GM543171@nvidia.com>
Date: Tue, 10 Jun 2025 20:41:41 -0300
From: Jason Gunthorpe <jgg@...dia.com>
To: Nicolin Chen <nicolinc@...dia.com>
Cc: Robin Murphy <robin.murphy@....com>,
	Baolu Lu <baolu.lu@...ux.intel.com>, joro@...tes.org,
	will@...nel.org, bhelgaas@...gle.com, iommu@...ts.linux.dev,
	linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
	patches@...ts.linux.dev, pjaroszynski@...dia.com, vsethi@...dia.com
Subject: Re: [PATCH RFC v1 1/2] iommu: Introduce iommu_dev_reset_prepare()
 and iommu_dev_reset_done()

On Tue, Jun 10, 2025 at 01:19:22PM -0700, Nicolin Chen wrote:

> > > And on an unrelated thought that's just come to mind, if we ever did FLR
> > > with PASIDs enabled, presumably that's going to wipe out the PASID
> > > configuration,
> > 
> > I've always been expecting the PCI FLR code to preserve the config
> > space that belongs the iommu subsystem. PASID, ATS, PRI, etc. Never
> > looked into it... Nicolin??
> 
> Those are the flags in struct pci_dev right?
> unsigned int    ats_enabled:1;          /* Address Translation Svc */
> unsigned int    pasid_enabled:1;        /* Process Address Space ID */
> unsigned int    pri_enabled:1;          /* Page Request Interface */
> 
> And pci_restore_state() does the recovery of these bits.

Yes, that all looks like the right stuff to me.

Jason

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