linux-kernel - Re: [PATCH v4 3/5] net: phy: qcom: at803x: Add Qualcomm IPQ5018 Internal PHY support

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Message-ID:
 <BL4PR19MB8902726DC9C0E8C8FE8155F79D6AA@BL4PR19MB8902.namprd19.prod.outlook.com>
Date: Tue, 10 Jun 2025 11:31:46 +0400
From: George Moussalem <george.moussalem@...look.com>
To: "Russell King (Oracle)" <linux@...linux.org.uk>
Cc: Andrew Lunn <andrew@...n.ch>, Heiner Kallweit <hkallweit1@...il.com>,
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>, Florian Fainelli <f.fainelli@...il.com>,
 Philipp Zabel <p.zabel@...gutronix.de>,
 Bjorn Andersson <andersson@...nel.org>,
 Konrad Dybcio <konradybcio@...nel.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, netdev@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
 linux-clk@...r.kernel.org
Subject: Re: [PATCH v4 3/5] net: phy: qcom: at803x: Add Qualcomm IPQ5018
 Internal PHY support

On 6/9/25 18:05, Russell King (Oracle) wrote:
> On Mon, Jun 09, 2025 at 03:44:36PM +0400, George Moussalem via B4 Relay wrote:
>> +static int ipq5018_config_init(struct phy_device *phydev)
>> +{
>> +	struct ipq5018_priv *priv = phydev->priv;
>> +	u16 val = 0;
> 
> Useless initialisation. See the first statement below which immediately
> assigns a value to val. I've no idea why people think local variables
> need initialising in cases like this, but it seems to have become a
> common pattern. I can only guess that someone is teaching this IMHO bad
> practice.
> 

val is not initialized in v5.

>> +
>> +	/*
>> +	 * set LDO efuse: first temporarily store ANA_DAC_FILTER value from
>> +	 * debug register as it will be reset once the ANA_LDO_EFUSE register
>> +	 * is written to
>> +	 */
>> +	val = at803x_debug_reg_read(phydev, IPQ5018_PHY_DEBUG_ANA_DAC_FILTER);
>> +	at803x_debug_reg_mask(phydev, IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE,
>> +			      IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE_MASK,
>> +			      IPQ5018_PHY_DEBUG_ANA_LDO_EFUSE_DEFAULT);
>> +	at803x_debug_reg_write(phydev, IPQ5018_PHY_DEBUG_ANA_DAC_FILTER, val);
>> +
>> +	/* set 8023AZ CTRL values */
>> +	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_AZ_CTRL1,
>> +		      IPQ5018_PHY_PCS_AZ_CTRL1_VAL);
>> +	phy_write_mmd(phydev, MDIO_MMD_PCS, IPQ5018_PHY_PCS_AZ_CTRL2,
>> +		      IPQ5018_PHY_PCS_AZ_CTRL2_VAL);
> 
> The comment doesn't help understand what's going on here, neither do the
> register definition names.

These are the EEE TX and RX timer values. Will update the macro 
definitions accordingly.

> 
> Also, what interface modes on the host side does this PHY actually
> support?

Based on the QCA-SSDK and the reference boards, the PHY supports SGMII 
mode. I can't speak with 100% certainty, but SGMII is the only mode used 
so I can't rule out whether GMII, MII, or other modes are supported. 
I'll add it to the commit message.

> 
>> +	priv->rst = devm_reset_control_array_get_exclusive(dev);
>> +	if (IS_ERR_OR_NULL(priv->rst))
>> +		return dev_err_probe(dev, PTR_ERR(priv->rst),
>> +				     "failed to acquire reset\n");
> 
> Why IS_ERR_OR_NULL() ? What error do you think will be returned by this
> if priv->rst is NULL? (Hint: PTR_ERR(NULL) is 0.)
> 

Changed to IS_ERR in v5.

Thanks,
George