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Message-ID: <20250610100311.2245871-4-heikki.krogerus@linux.intel.com>
Date: Tue, 10 Jun 2025 13:03:09 +0300
From: Heikki Krogerus <heikki.krogerus@...ux.intel.com>
To: Lucas De Marchi <lucas.demarchi@...el.com>,
Thomas Hellström <thomas.hellstrom@...ux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@...el.com>,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>
Cc: David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Mika Westerberg <mika.westerberg@...ux.intel.com>,
Jan Dabros <jsd@...ihalf.com>,
Andi Shyti <andi.shyti@...nel.org>,
Raag Jadav <raag.jadav@...el.com>,
"Tauro, Riana" <riana.tauro@...el.com>,
"Adatrao, Srinivasa" <srinivasa.adatrao@...el.com>,
"Michael J. Ruhl" <michael.j.ruhl@...el.com>,
intel-xe@...ts.freedesktop.org,
linux-i2c@...r.kernel.org,
linux-kernel@...r.kernel.org,
Karthik Poosa <karthik.poosa@...el.com>
Subject: [PATCH v2 3/4] drm/xe/pm: Wire up suspend/resume for I2C controller
From: Raag Jadav <raag.jadav@...el.com>
Wire up suspend/resume handles for I2C controller to match its power
state with SGUnit.
Signed-off-by: Raag Jadav <raag.jadav@...el.com>
Reviewed-by: Karthik Poosa <karthik.poosa@...el.com>
Signed-off-by: Heikki Krogerus <heikki.krogerus@...ux.intel.com>
---
drivers/gpu/drm/xe/regs/xe_i2c_regs.h | 5 +++++
drivers/gpu/drm/xe/xe_i2c.c | 29 +++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_i2c.h | 4 ++++
drivers/gpu/drm/xe/xe_pm.c | 9 +++++++++
4 files changed, 47 insertions(+)
diff --git a/drivers/gpu/drm/xe/regs/xe_i2c_regs.h b/drivers/gpu/drm/xe/regs/xe_i2c_regs.h
index fa7223e6ce9e..27f9935fd8fd 100644
--- a/drivers/gpu/drm/xe/regs/xe_i2c_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_i2c_regs.h
@@ -2,6 +2,8 @@
#ifndef _XE_I2C_REGS_H_
#define _XE_I2C_REGS_H_
+#include <linux/pci_regs.h>
+
#include "xe_reg_defs.h"
#include "xe_regs.h"
@@ -12,4 +14,7 @@
#define CLIENT_DISC_COOKIE XE_REG(SOC_BASE + 0x0164)
#define CLIENT_DISC_ADDRESS XE_REG(SOC_BASE + 0x0168)
+#define I2C_CONFIG_CMD XE_REG(I2C_CONFIG_SPACE_OFFSET + PCI_COMMAND)
+#define I2C_CONFIG_PMCSR XE_REG(I2C_CONFIG_SPACE_OFFSET + 0x84)
+
#endif /* _XE_I2C_REGS_H_ */
diff --git a/drivers/gpu/drm/xe/xe_i2c.c b/drivers/gpu/drm/xe/xe_i2c.c
index 3d649602ede8..59bdf28717bc 100644
--- a/drivers/gpu/drm/xe/xe_i2c.c
+++ b/drivers/gpu/drm/xe/xe_i2c.c
@@ -208,6 +208,31 @@ static const struct regmap_config i2c_regmap_config = {
.fast_io = true,
};
+void xe_i2c_pm_suspend(struct xe_device *xe)
+{
+ struct xe_mmio *mmio = xe_root_tile_mmio(xe);
+
+ if (!xe->i2c || xe->i2c->ep.cookie != XE_I2C_EP_COOKIE_DEVICE)
+ return;
+
+ xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, PCI_D3hot);
+ drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR));
+}
+
+void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold)
+{
+ struct xe_mmio *mmio = xe_root_tile_mmio(xe);
+
+ if (!xe->i2c || xe->i2c->ep.cookie != XE_I2C_EP_COOKIE_DEVICE)
+ return;
+
+ if (d3cold)
+ xe_mmio_rmw32(mmio, I2C_CONFIG_CMD, 0, PCI_COMMAND_MEMORY);
+
+ xe_mmio_rmw32(mmio, I2C_CONFIG_PMCSR, PCI_PM_CTRL_STATE_MASK, PCI_D0);
+ drm_dbg(&xe->drm, "pmcsr: 0x%08x\n", xe_mmio_read32(mmio, I2C_CONFIG_PMCSR));
+}
+
static void xe_i2c_remove(void *data)
{
struct xe_i2c *i2c = data;
@@ -240,6 +265,10 @@ int xe_i2c_probe(struct xe_device *xe)
i2c->mmio = xe_root_tile_mmio(xe);
i2c->drm_dev = xe->drm.dev;
i2c->ep = ep;
+ xe->i2c = i2c;
+
+ /* PCI PM isn't aware of this device, bring it up and match it with SGUnit state. */
+ xe_i2c_pm_resume(xe, true);
regmap = devm_regmap_init(i2c->drm_dev, NULL, i2c, &i2c_regmap_config);
if (IS_ERR(regmap))
diff --git a/drivers/gpu/drm/xe/xe_i2c.h b/drivers/gpu/drm/xe/xe_i2c.h
index e88845be61b4..3b1208416bde 100644
--- a/drivers/gpu/drm/xe/xe_i2c.h
+++ b/drivers/gpu/drm/xe/xe_i2c.h
@@ -50,9 +50,13 @@ struct xe_i2c {
#if IS_ENABLED(CONFIG_I2C)
int xe_i2c_probe(struct xe_device *xe);
void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl);
+void xe_i2c_pm_suspend(struct xe_device *xe);
+void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold);
#else
static inline int xe_i2c_probe(struct xe_device *xe) { return 0; }
static inline void xe_i2c_irq_handler(struct xe_device *xe, u32 master_ctl) { }
+static inline void xe_i2c_pm_suspend(struct xe_device *xe) { }
+static inline void xe_i2c_pm_resume(struct xe_device *xe, bool d3cold) { }
#endif
#endif
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 26e95460af87..46471e166b96 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -19,6 +19,7 @@
#include "xe_ggtt.h"
#include "xe_gt.h"
#include "xe_guc.h"
+#include "xe_i2c.h"
#include "xe_irq.h"
#include "xe_pcode.h"
#include "xe_pxp.h"
@@ -146,6 +147,8 @@ int xe_pm_suspend(struct xe_device *xe)
xe_display_pm_suspend_late(xe);
+ xe_i2c_pm_suspend(xe);
+
drm_dbg(&xe->drm, "Device suspended\n");
return 0;
@@ -191,6 +194,8 @@ int xe_pm_resume(struct xe_device *xe)
if (err)
goto err;
+ xe_i2c_pm_resume(xe, xe->d3cold.allowed);
+
xe_irq_resume(xe);
for_each_gt(gt, xe, id)
@@ -484,6 +489,8 @@ int xe_pm_runtime_suspend(struct xe_device *xe)
xe_display_pm_runtime_suspend_late(xe);
+ xe_i2c_pm_suspend(xe);
+
xe_rpm_lockmap_release(xe);
xe_pm_write_callback_task(xe, NULL);
return 0;
@@ -531,6 +538,8 @@ int xe_pm_runtime_resume(struct xe_device *xe)
goto out;
}
+ xe_i2c_pm_resume(xe, xe->d3cold.allowed);
+
xe_irq_resume(xe);
for_each_gt(gt, xe, id)
--
2.47.2
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