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Message-ID: <121aac04-45ff-48c6-bab9-d57bf3f8524a@linux.intel.com>
Date: Wed, 11 Jun 2025 10:29:36 +0800
From: "Mi, Dapeng" <dapeng1.mi@...ux.intel.com>
To: Sean Christopherson <seanjc@...gle.com>,
 Paolo Bonzini <pbonzini@...hat.com>
Cc: kvm@...r.kernel.org, linux-kernel@...r.kernel.org,
 Chao Gao <chao.gao@...el.com>, Borislav Petkov <bp@...en8.de>,
 Xin Li <xin@...or.com>, Francesco Lavra <francescolavra.fl@...il.com>,
 Manali Shukla <Manali.Shukla@....com>
Subject: Re: [PATCH v2 17/32] KVM: x86: Move definition of X2APIC_MSR() to
 lapic.h


On 6/11/2025 6:57 AM, Sean Christopherson wrote:
> Dedup the definition of X2APIC_MSR and put it in the local APIC code
> where it belongs.
>
> No functional change intended.
>
> Signed-off-by: Sean Christopherson <seanjc@...gle.com>
> ---
>  arch/x86/kvm/lapic.h   | 2 ++
>  arch/x86/kvm/svm/svm.c | 2 --
>  arch/x86/kvm/vmx/vmx.h | 2 --
>  3 files changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/kvm/lapic.h b/arch/x86/kvm/lapic.h
> index 4ce30db65828..4518b4e0552f 100644
> --- a/arch/x86/kvm/lapic.h
> +++ b/arch/x86/kvm/lapic.h
> @@ -21,6 +21,8 @@
>  #define APIC_BROADCAST			0xFF
>  #define X2APIC_BROADCAST		0xFFFFFFFFul
>  
> +#define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4))
> +
>  enum lapic_mode {
>  	LAPIC_MODE_DISABLED = 0,
>  	LAPIC_MODE_INVALID = X2APIC_ENABLE,
> diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
> index 4ee92e444dde..900a1303e0e7 100644
> --- a/arch/x86/kvm/svm/svm.c
> +++ b/arch/x86/kvm/svm/svm.c
> @@ -81,8 +81,6 @@ static uint64_t osvw_len = 4, osvw_status;
>  
>  static DEFINE_PER_CPU(u64, current_tsc_ratio);
>  
> -#define X2APIC_MSR(x)	(APIC_BASE_MSR + (x >> 4))
> -
>  static const u32 direct_access_msrs[] = {
>  	MSR_STAR,
>  	MSR_IA32_SYSENTER_CS,
> diff --git a/arch/x86/kvm/vmx/vmx.h b/arch/x86/kvm/vmx/vmx.h
> index b5758c33c60f..0afe97e3478f 100644
> --- a/arch/x86/kvm/vmx/vmx.h
> +++ b/arch/x86/kvm/vmx/vmx.h
> @@ -19,8 +19,6 @@
>  #include "../mmu.h"
>  #include "common.h"
>  
> -#define X2APIC_MSR(r) (APIC_BASE_MSR + ((r) >> 4))
> -
>  #ifdef CONFIG_X86_64
>  #define MAX_NR_USER_RETURN_MSRS	7
>  #else

Reviewed-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>



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